Hi Geert,
I've been reading all the review history of this series and now
I'm walking through all the review history again do see if
everything has been
> > >>>> On the manual I've downloaded from Renesas web site the FMPE bit of RIICnFER is not available on
> > >>>> RZ/A1H.
> > >>>
> > >>> I just found RZ/A2M manual, it supports FMP and register layout looks similar to RZ/G2L.
> > >>
> > >> I introduced struct riic_of_data::fast_mode_plus because of RZ/A1H.
> > >
> > > Do you need to check for that?
> > >
> > > The ICFER_FMPE bit won't be set unless the user specifies the FM+
> > > clock-frequency. Setting clock-frequency beyond Fast Mode on RZ/A1H
> > > would be very wrong.
> >
> > I need it to avoid this scenario ^. In patch 09/12 there is this code:
> >
> > + if ((!info->fast_mode_plus && t->bus_freq_hz > I2C_MAX_FAST_MODE_FREQ) ||
> > + (info->fast_mode_plus && t->bus_freq_hz > I2C_MAX_FAST_MODE_PLUS_FREQ)) {
> > + dev_err(dev, "unsupported bus speed (%dHz). %d max\n", t->bus_freq_hz,
> > + info->fast_mode_plus ? I2C_MAX_FAST_MODE_PLUS_FREQ :
> > + I2C_MAX_FAST_MODE_FREQ);
> > return -EINVAL;
> >
> > to avoid giving the user the possibility to set FM+ freq on platforms not
> > supporting it.
> >
> > Please let me know if I'm missing something (or wrongly understood your
> > statement).
>
> Wolfram/Andi: what is your view on this?
I don't have anything against it... what exactly are you
proposing here?
If you want you can directly reply to the v4 6/11 patch.
Thanks Geert for checking on this series.
Andi
