RE: [PATCH v2 4/9] clk: renesas: r9a07g043: Add LCDC clock and reset entries

[Biju Das <biju.das.jz@xxxxxxxxxxxxxx>]

Hi Geert,

> -----Original Message-----
> From: Geert Uytterhoeven <geert@xxxxxxxxxxxxxx>
> Sent: Friday, July 12, 2024 2:44 PM
> Subject: Re: [PATCH v2 4/9] clk: renesas: r9a07g043: Add LCDC clock and reset entries
> 
> On Tue, Jul 9, 2024 at 3:52 PM Biju Das <biju.das.jz@xxxxxxxxxxxxxx> wrote:
> > Add LCDC clock and reset entries to CPG driver.
> >
> > Signed-off-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
> 
> Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx> i.e. will queue in renesas-clk for v6.12.
> 
> > --- a/drivers/clk/renesas/r9a07g043-cpg.c
> > +++ b/drivers/clk/renesas/r9a07g043-cpg.c
> > @@ -209,6 +214,12 @@ static const struct rzg2l_mod_clk r9a07g043_mod_clks[] = {
> >                                 0x564, 2),
> >         DEF_MOD("cru_aclk",     R9A07G043_CRU_ACLK, R9A07G043_CLK_M0,
> >                                 0x564, 3),
> > +       DEF_COUPLED("lcdc_clka", R9A07G043_LCDC_CLK_A, R9A07G043_CLK_M0,
> > +                               0x56c, 0),
> > +       DEF_COUPLED("lcdc_clkp", R9A07G043_LCDC_CLK_P, R9A07G043_CLK_ZT,
> > +                               0x56c, 0),
> > +       DEF_MOD("lcdc_clkd",    R9A07G043_LCDC_CLK_D, R9A07G043_CLK_M3,
> > +                               0x56c, 1),
> 
> With the above clock names changed to "lcdc_clk_[apd]" to match the clock definitions.

Thanks for fixing it.

Cheers,
Biju