[PATCH] arm64: dts: renesas: white-hawk: ethernet: Define AVB1 and AVB2 PHY

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Align with other Renesas SoCs and use the specific compatible for the
PHYs connected to AVB1 and AVB2, Marvell 88Q2110/QFN40. This allows
software to identify the PHY model at any time, regardless of the state
of the PHY reset line.

Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@xxxxxxxxxxxx>
---
 arch/arm64/boot/dts/renesas/white-hawk-ethernet.dtsi | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/renesas/white-hawk-ethernet.dtsi b/arch/arm64/boot/dts/renesas/white-hawk-ethernet.dtsi
index 595ec4ff4cdd..40a08b57b479 100644
--- a/arch/arm64/boot/dts/renesas/white-hawk-ethernet.dtsi
+++ b/arch/arm64/boot/dts/renesas/white-hawk-ethernet.dtsi
@@ -27,7 +27,8 @@ mdio {
 		reset-post-delay-us = <4000>;
 
 		avb1_phy: ethernet-phy@0 {
-			compatible = "ethernet-phy-ieee802.3-c45";
+			compatible = "ethernet-phy-id002b.0980",
+				     "ethernet-phy-ieee802.3-c22";
 			reg = <0>;
 			interrupt-parent = <&gpio6>;
 			interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
@@ -49,7 +50,8 @@ mdio {
 		reset-post-delay-us = <4000>;
 
 		avb2_phy: ethernet-phy@0 {
-			compatible = "ethernet-phy-ieee802.3-c45";
+			compatible = "ethernet-phy-id002b.0980",
+				     "ethernet-phy-ieee802.3-c22";
 			reg = <0>;
 			interrupt-parent = <&gpio5>;
 			interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
-- 
2.45.2





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