On 6/24/24 4:25 PM, Geert Uytterhoeven wrote: > All EtherAVB instances on R-Car Gen3/Gen4 SoCs support the RGMII > interface. In addition, the first two EtherAVB instances on R-Car V4M > also support the MII interface, but this is not yet supported by the > driver. > > Add support for MII on R-Car Gen4 by adding an R-Car Gen4-specific EMAC > initialization function that selects the MII clock instead of the RGMII > clock when the PHY interface is MII. Note that all implementations of > EtherAVB on R-Car Gen4 SoCs have the APSR register, but only MII-capable > instances are documented to have the MIISELECT bit, which has a > documented value of zero when reserved. > > Signed-off-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx> > Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@xxxxxxxxxxxx> Reviewed-by: Sergey Shtylyov <s.shtylyov@xxxxxx> [...] MBR, Sergey
