On Wed, 15 May 2024 at 16:02, Geert Uytterhoeven
<geert+renesas@xxxxxxxxx> wrote:
>
> Booting an LPAE-enabled kernel built with CONFIG_CC_OPTIMIZE_FOR_SIZE=y
> fails when starting userspace:
>
> Kernel panic - not syncing: Attempted to kill init! exitcode=0x00000004
> CPU: 1 PID: 1 Comm: init Tainted: G W N 6.9.0-rc1-koelsch-00004-g7af5b901e847 #1930
> Hardware name: Generic R-Car Gen2 (Flattened Device Tree)
> Call trace:
> unwind_backtrace from show_stack+0x10/0x14
> show_stack from dump_stack_lvl+0x78/0xa8
> dump_stack_lvl from panic+0x118/0x398
> panic from do_exit+0x1ec/0x938
> do_exit from sys_exit_group+0x0/0x10
> ---[ end Kernel panic - not syncing: Attempted to kill init! exitcode=0x00000004 ]---
>
> Add the missing memory clobber to cpu_set_ttbcr(), as suggested by
> Russell King.
>
> Force inlining of uaccess_save_and_enable(), as suggested by Ard
> Biesheuvel.
>
> The latter fixes booting on Koelsch.
>
> Fixes: 7af5b901e84743c6 ("ARM: 9358/2: Implement PAN for LPAE by TTBR0 page table walks disablement")
> Closes: https://lore.kernel.org/r/CAMuHMdWTAJcZ9BReWNhpmsgkOzQxLNb5OhNYxzxv6D5TSh2fwQ@xxxxxxxxxxxxxx/
> Signed-off-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
This works around what appears to be a compiler bug (see my reply to
the other thread), and this change (the __always_inline in particular)
seems to work around it, so
Acked-by: Ard Biesheuvel <ardb@xxxxxxxxxx>
> ---
> Feel free to fold into the original commit.
>
> Apparently the "From: Catalin Marinas <catalin.marinas@xxxxxxx>" in
> https://lore.kernel.org/r/20240312-arm32-lpae-pan-v3-4-532647afcd38@xxxxxxxxxx
> is not reflected in commit 7af5b901e84743c6?
> ---
> arch/arm/include/asm/proc-fns.h | 2 +-
> arch/arm/include/asm/uaccess.h | 2 +-
> 2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/include/asm/proc-fns.h b/arch/arm/include/asm/proc-fns.h
> index 9b3105a2a5e0691e..b4986a23d8528a50 100644
> --- a/arch/arm/include/asm/proc-fns.h
> +++ b/arch/arm/include/asm/proc-fns.h
> @@ -187,7 +187,7 @@ static inline unsigned int cpu_get_ttbcr(void)
>
> static inline void cpu_set_ttbcr(unsigned int ttbcr)
> {
> - asm("mcr p15, 0, %0, c2, c0, 2" : : "r" (ttbcr));
> + asm volatile("mcr p15, 0, %0, c2, c0, 2" : : "r" (ttbcr) : "memory");
> }
>
> #else /*!CONFIG_MMU */
> diff --git a/arch/arm/include/asm/uaccess.h b/arch/arm/include/asm/uaccess.h
> index 25d21d7d6e3efee0..6c9c16d767cfd5df 100644
> --- a/arch/arm/include/asm/uaccess.h
> +++ b/arch/arm/include/asm/uaccess.h
> @@ -47,7 +47,7 @@ static __always_inline void uaccess_restore(unsigned int flags)
>
> #elif defined(CONFIG_CPU_TTBR0_PAN)
>
> -static inline unsigned int uaccess_save_and_enable(void)
> +static __always_inline unsigned int uaccess_save_and_enable(void)
> {
> unsigned int old_ttbcr = cpu_get_ttbcr();
>
> --
> 2.34.1
>
