CLK_ENABLE_ON_INIT is a relic from the old SH clock framework.
It is no longer used on SH/R-Mobile ARM drivers.
Signed-off-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
---
To be queued in renesas-clk for v6.10.
---
drivers/clk/renesas/clk-r8a73a4.c | 2 --
drivers/clk/renesas/clk-r8a7740.c | 2 --
drivers/clk/renesas/clk-sh73a0.c | 2 --
3 files changed, 6 deletions(-)
diff --git a/drivers/clk/renesas/clk-r8a73a4.c b/drivers/clk/renesas/clk-r8a73a4.c
index f45c2c45808be0b5..4b1815147f7769fc 100644
--- a/drivers/clk/renesas/clk-r8a73a4.c
+++ b/drivers/clk/renesas/clk-r8a73a4.c
@@ -30,8 +30,6 @@ struct r8a73a4_cpg {
#define CPG_PLL2HCR 0xe4
#define CPG_PLL2SCR 0xf4
-#define CLK_ENABLE_ON_INIT BIT(0)
-
struct div4_clk {
const char *name;
unsigned int reg;
diff --git a/drivers/clk/renesas/clk-r8a7740.c b/drivers/clk/renesas/clk-r8a7740.c
index 325394b6e55e228d..22e9be7240bb2239 100644
--- a/drivers/clk/renesas/clk-r8a7740.c
+++ b/drivers/clk/renesas/clk-r8a7740.c
@@ -26,8 +26,6 @@ struct r8a7740_cpg {
#define CPG_USBCKCR 0x8c
#define CPG_FRQCRC 0xe0
-#define CLK_ENABLE_ON_INIT BIT(0)
-
struct div4_clk {
const char *name;
unsigned int reg;
diff --git a/drivers/clk/renesas/clk-sh73a0.c b/drivers/clk/renesas/clk-sh73a0.c
index 8c51090f13e13b31..47fc99ccd283826c 100644
--- a/drivers/clk/renesas/clk-sh73a0.c
+++ b/drivers/clk/renesas/clk-sh73a0.c
@@ -34,8 +34,6 @@ struct sh73a0_cpg {
#define CPG_DSI0PHYCR 0x6c
#define CPG_DSI1PHYCR 0x70
-#define CLK_ENABLE_ON_INIT BIT(0)
-
struct div4_clk {
const char *name;
const char *parent;
--
2.34.1
