Hi Geert, On Fri, Mar 15, 2024 at 6:35 PM Geert Uytterhoeven <geert@xxxxxxxxxxxxxx> wrote: > > Hi Prabhakar,, > > On Fri, Mar 15, 2024 at 1:50 PM Geert Uytterhoeven <geert@xxxxxxxxxxxxxx> wrote: > > On Fri, Mar 15, 2024 at 11:31 AM Prabhakar <prabhakar.csengg@xxxxxxxxx> wrote: > > > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx> > > > > > > Document support for the I2C Bus Interface (RIIC) available in the > > > Renesas RZ/V2H(P) (R9A09G057) SoC. > > > > > > The RIIC interface in the Renesas RZ/V2H(P) differs from RZ/A in a > > > couple of ways: > > > - Register offsets for the RZ/V2H(P) SoC differ from those of the > > > RZ/A SoC. > > > - RZ/V2H register access is limited to 8-bit, whereas RZ/A supports > > > 8/16/32-bit. > > > - RZ/V2H has bit differences in the slave address register. > > > > > > To accommodate these differences in the existing driver, a new compatible > > > string "renesas,riic-r9a09g057" is added. > > As it looks like there will be a v3 of this series, please drop "in > the existing driver". > Sure I'll drop it. Cheers, Prabhakar
