On Thu, 07 Mar 2024 16:07:23 +0200, Claudiu wrote: > From: Claudiu Beznea <claudiu.beznea.uj@xxxxxxxxxxxxxx> > > The driver will be modified (in the next commits) to be able to specify > individual power domain ID for each IP. The driver will still > support #power-domain-cells = <0>, thus, previous users are not > affected. > > The #power-domain-cells = <1> has been instantiated only for RZ/G3S at > the moment as individual platform clock drivers need to be adapted for > this to be supported on the rest of the SoCs. > > Also, the description for #power-domain-cells was updated with the links > to per-SoC power domain IDs. > > Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@xxxxxxxxxxxxxx> > --- > > Changes in v2: > - updated patch title and description > - kept both 0 and 1 for #power-domain-cells as not all the drivers, > device trees are adpated with this series > - added a reference to dt-bindings/clock/r9a0*-cpg.h for power domain > specifiers > - dropped the changes from examples section > > .../bindings/clock/renesas,rzg2l-cpg.yaml | 18 +++++++++++++++++- > 1 file changed, 17 insertions(+), 1 deletion(-) > Reviewed-by: Rob Herring <robh@xxxxxxxxxx>
