On Mon, 26 Feb 2024 11:59:45 +0100, Geert Uytterhoeven wrote: > The M2 (CRU main clock), M3 (LCDC Video Clock), and AT (Cortex-A55 Debug > clock) core clocks are only present on RZ/G2UL, not on RZ/Five. > > Annotate this in the comments, like is already done for module clocks > and resets. > > Signed-off-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx> > --- > To be queued in renesas-clk for v6.10. > > include/dt-bindings/clock/r9a07g043-cpg.h | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > Acked-by: Rob Herring <robh@xxxxxxxxxx>
