On Fri, 09 Feb 2024, Wolfram Sang wrote:
> Reformat the comments to utilize the maximum line length and use single
> line comments where appropriate. Remove superfluous comments, too.
>
> Signed-off-by: Wolfram Sang <wsa+renesas@xxxxxxxxxxxxxxxxxxxx>
> ---
> include/linux/mfd/tmio.h | 32 +++++++++++---------------------
> 1 file changed, 11 insertions(+), 21 deletions(-)
Acked-by: Lee Jones <lee@xxxxxxxxxx>
> diff --git a/include/linux/mfd/tmio.h b/include/linux/mfd/tmio.h
> index f71d4e507dcb..1cf418643da9 100644
> --- a/include/linux/mfd/tmio.h
> +++ b/include/linux/mfd/tmio.h
> @@ -5,23 +5,23 @@
> #include <linux/platform_device.h>
> #include <linux/types.h>
>
> -/* tmio MMC platform flags */
> +/* TMIO MMC platform flags */
> +
> /*
> - * Some controllers can support a 2-byte block size when the bus width
> - * is configured in 4-bit mode.
> + * Some controllers can support a 2-byte block size when the bus width is
> + * configured in 4-bit mode.
> */
> #define TMIO_MMC_BLKSZ_2BYTES BIT(1)
> -/*
> - * Some controllers can support SDIO IRQ signalling.
> - */
> +
> +/* Some controllers can support SDIO IRQ signalling */
> #define TMIO_MMC_SDIO_IRQ BIT(2)
>
> /* Some features are only available or tested on R-Car Gen2 or later */
> #define TMIO_MMC_MIN_RCAR2 BIT(3)
>
> /*
> - * Some controllers require waiting for the SD bus to become
> - * idle before writing to some registers.
> + * Some controllers require waiting for the SD bus to become idle before
> + * writing to some registers.
> */
> #define TMIO_MMC_HAS_IDLE_WAIT BIT(4)
>
> @@ -32,31 +32,21 @@
> */
> #define TMIO_MMC_USE_BUSY_TIMEOUT BIT(5)
>
> -/*
> - * Some controllers have CMD12 automatically
> - * issue/non-issue register
> - */
> +/* Some controllers have CMD12 automatically issue/non-issue register */
> #define TMIO_MMC_HAVE_CMD12_CTRL BIT(7)
>
> /* Controller has some SDIO status bits which must be 1 */
> #define TMIO_MMC_SDIO_STATUS_SETBITS BIT(8)
>
> -/*
> - * Some controllers have a 32-bit wide data port register
> - */
> +/* Some controllers have a 32-bit wide data port register */
> #define TMIO_MMC_32BIT_DATA_PORT BIT(9)
>
> -/*
> - * Some controllers allows to set SDx actual clock
> - */
> +/* Some controllers allows to set SDx actual clock */
> #define TMIO_MMC_CLK_ACTUAL BIT(10)
>
> /* Some controllers have a CBSY bit */
> #define TMIO_MMC_HAVE_CBSY BIT(11)
>
> -/*
> - * data for the MMC controller
> - */
> struct tmio_mmc_data {
> void *chan_priv_tx;
> void *chan_priv_rx;
> --
> 2.43.0
>
--
Lee Jones [李琼斯]
