Re: [PATCH v3 net-next 1/2] ravb: Add Rx checksum offload support for GbEth

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On 2/2/24 10:12 PM, Sergey Shtylyov wrote:

>> TOE has hardware support for calculating IP header and TCP/UDP/ICMP
>> checksum for both IPv4 and IPv6.
>>
>> Add Rx checksum offload supported by TOE for IPv4 and TCP/UDP protocols.
>>
>> For Rx, the 4-byte result of checksum calculation is attached to the
>> Ethernet frames.First 2-bytes is result of IPv4 header checksum and next
>> 2-bytes is TCP/UDP/ICMP checksum.
>>
>> If a frame does not have checksum error, 0x0000 is attached as checksum
>> calculation result. For unsupported frames 0xFFFF is attached as checksum
>> calculation result. In case of an IPv6 packet, IPv4 checksum is always set
>> to 0xFFFF.
>>
>> We can test this functionality by the below commands
>>
>> ethtool -K eth0 rx on --> to turn on Rx checksum offload
>> ethtool -K eth0 rx off --> to turn off Rx checksum offload
>>
>> Signed-off-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
[...]
>> diff --git a/drivers/net/ethernet/renesas/ravb_main.c b/drivers/net/ethernet/renesas/ravb_main.c
>> index 0e3731f50fc2..c4dc6ec54287 100644
>> --- a/drivers/net/ethernet/renesas/ravb_main.c
>> +++ b/drivers/net/ethernet/renesas/ravb_main.c
[...]
>> @@ -2334,11 +2381,49 @@ static void ravb_set_rx_csum(struct net_device *ndev, bool enable)
>>  	spin_unlock_irqrestore(&priv->lock, flags);
>>  }
>>  
>> +static int ravb_endisable_csum_gbeth(struct net_device *ndev, enum ravb_reg reg,
>> +				     u32 val, u32 mask)
> 
>    I'd suggest to mimic ravb_wait() with the the mask param followed by
> the val[ue] param...

   Nevermind, I see now they are for different registers...

[...]

MBR, Sergey




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