From: Hai Pham <hai.pham.ud@xxxxxxxxxxx>
Add a device node for the Pin Function Controller on the Renesas R-Car
V4M (R8A779H0) SoC.
Signed-off-by: Hai Pham <hai.pham.ud@xxxxxxxxxxx>
Signed-off-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
---
arch/arm64/boot/dts/renesas/r8a779h0.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a779h0.dtsi b/arch/arm64/boot/dts/renesas/r8a779h0.dtsi
index a082e2d06b696019..f59d0dd25ca93822 100644
--- a/arch/arm64/boot/dts/renesas/r8a779h0.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a779h0.dtsi
@@ -59,6 +59,14 @@ soc: soc {
#size-cells = <2>;
ranges;
+ pfc: pinctrl@e6050000 {
+ compatible = "renesas,pfc-r8a779h0";
+ reg = <0 0xe6050000 0 0x16c>, <0 0xe6050800 0 0x16c>,
+ <0 0xe6058000 0 0x16c>, <0 0xe6058800 0 0x16c>,
+ <0 0xe6060000 0 0x16c>, <0 0xe6060800 0 0x16c>,
+ <0 0xe6061000 0 0x16c>, <0 0xe6061800 0 0x16c>;
+ };
+
cpg: clock-controller@e6150000 {
compatible = "renesas,r8a779h0-cpg-mssr";
reg = <0 0xe6150000 0 0x4000>;
--
2.34.1
