Hi Thomas, On Fri, Dec 08, 2023 at 04:54:34PM +0100, Thomas Gleixner wrote: > On Wed, Nov 22 2023 at 20:12, Yu Chien Peter Lin wrote: > > Currently, the implementation of the RISC-V INTC driver uses the > > interrupt cause as hwirq and has a limitation of supporting a > > s/hwirq/hardware interrupt/ > > Please spell things out. We are not on Xitter here. > > > maximum of 64 hwirqs. However, according to the privileged spec, > > interrupt causes >= 16 are defined for platform use. > > > > This limitation prevents us from fully utilizing the available > > This limitation prevents to fully utilize the ... Okay, will fix. Thanks, Peter Lin
