Hi Guo Ren,
On Thu, Nov 23, 2023 at 05:14:30AM +0800, Guo Ren wrote:
> On Wed, Nov 22, 2023 at 8:17 PM Yu Chien Peter Lin
> <peterlin@xxxxxxxxxxxxx> wrote:
> >
> > Document the ISA string for T-Head performance monitor extension
> > which provides counter overflow interrupt mechanism.
> >
> > Signed-off-by: Yu Chien Peter Lin <peterlin@xxxxxxxxxxxxx>
> > ---
> > Changes v2 -> v3:
> > - New patch
> > Changes v3 -> v4:
> > - No change
> > ---
> > Documentation/devicetree/bindings/riscv/extensions.yaml | 6 ++++++
> > 1 file changed, 6 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/riscv/extensions.yaml b/Documentation/devicetree/bindings/riscv/extensions.yaml
> > index c91ab0e46648..694efaea8fce 100644
> > --- a/Documentation/devicetree/bindings/riscv/extensions.yaml
> > +++ b/Documentation/devicetree/bindings/riscv/extensions.yaml
> > @@ -258,5 +258,11 @@ properties:
> > in commit 2e5236 ("Ztso is now ratified.") of the
> > riscv-isa-manual.
> >
> > + - const: xtheadpmu
> > + description:
> > + The T-Head performance monitor extension for counter overflow. For more
> > + details, see the chapter 12 in the Xuantie C906 user manual.
> > + https://github.com/T-head-Semi/openc906/tree/main/doc
> > +
> > additionalProperties: true
> > ...
> > --
> > 2.34.1
> >
> Reviewed-by: Guo Ren <guoren@xxxxxxxxxx>
Thanks for the review.
Would you share document about T-Head PMU?
Best regards,
Peter Lin
> --
> Best Regards
> Guo Ren
