On 11/20/23 11:46 AM, Claudiu wrote:
> From: Claudiu Beznea <claudiu.beznea.uj@xxxxxxxxxxxxxx>
>
> ravb_rzv2m_hw_info::gptp_ref_clk is enabled only for RZ/V2M. RZ/V2M
> is an ARM64 based device which selects power domains by default and
> CONFIG_PM. The RZ/V2M Ethernet DT node has proper power-domain binding
> available in device tree from the commit that added the Ethernet node.
> (4872ca1f92b0 ("arm64: dts: renesas: r9a09g011: Add ethernet nodes")).
>
> Power domain support was available in rzg2l-cpg.c driver when the
> Ethernet DT node has been enabled in RZ/V2M device tree.
> (ef3c613ccd68 ("clk: renesas: Add CPG core wrapper for RZ/G2L SoC")).
>
> Thus remove the explicit clock enable for gptp_clk (and treat it as the
> other clocks are treated) as it is not needed and removing it doesn't
> break the ABI according to the above explanations.
>
> By removing the enable/disable operation from the driver we can add
> runtime PM support (which operates on clocks) w/o the need to handle
> the gptp_clk in Ethernet driver functions like ravb_runtime_nop().
> PM domain does all that is needed.
>
> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@xxxxxxxxxxxxxx>
Reviewed-by: Sergey Shtylyov <s.shtylyov@xxxxxx>
[...]
MBR, Sergey
