On 21/11/2023 13:10, Niklas Söderlund wrote:
>>> +
>>> + phy-handle:
>>> + $ref: /schemas/types.yaml#/definitions/phandle
>>> + description:
>>> + Specifies a reference to a node representing a PHY device.
>>
>> You miss top-level $ref to ethernet controller
>
> Sorry I don't fully understand what you are asking here, there are a few
> things about bindings I still need to learn. Looking at other bindings
> some have a
>
> maintainers:
> ..
>
> allOf:
> - $ref: ethernet-controller.yaml#
This one.
>
> properties:
> ..
>
> Is it this all ollOff node I'm missing?
>
>>
>>> +
>>> + renesas,rx-internal-delay:
>>> + type: boolean
>>> + description:
>>> + Enable internal Rx clock delay, typically 1.8ns.
>>
>> Why this is bool, not delay in ns?
>
> The TSN is only capable of enabling or disable internal delays, not set
> how long the delay is. The documentation states that the delay depends
> on the electronic characteristics of the particular board, but states
> that they typically are 1.8ns for Rx and 2.0ns for Tx.
I don't understand that part. If you cannot configure the internal
delay, how could it depend on the board characteristics?
>
> I looked at the generic properties {rx,tx}-internal-delay-ps but they
> are of int type. So I opted for a vendor specific bool property. Do you
> think a better route is to use the generic property and force the value
> to be either 0 or the typical delay?
>
>> Why this is property of a board (not SoC)?
>
> I'm sorry I don't understand this question.
Why setting internal delay is specific to a board, not to a SoC? Why
each board would need to configure it? On which parts of hardware on the
board does this depend?
Best regards,
Krzysztof
