As per section 8.14 on the AT25QL128A hardware manual[1], IO0..IO3 must be set to Hi-Z state for this flash for fast read quad IO. Snippet from HW manual section 8.14: The upper nibble of the Mode(M7-4) controls the length of the next FAST Read Quad IO instruction through the inclusion or exclusion of the first byte instruction code. The lower nibble bits of the Mode(M3-0) are don't care. However, the IO pins must be high-impedance before the falling edge of the first data out clock. Add set_iofv() callback for configuring IO fixed values to control the pin state. [1] https://www.renesas.com/eu/en/document/dst/at25ql128a-datasheet?r=1608586 Ref: https://patchwork.kernel.org/project/linux-renesas-soc/patch/20230830145835.296690-1-biju.das.jz@xxxxxxxxxxxxxx/ Biju Das (4): spi: spi-mem: Add set_iofv() callback mtd: spi-nor: Add post_sfdp() callback memory: renesas-rpc-if: Add support for overriding IO fixed values spi: rpc-if: Add set_iofv() callback drivers/memory/renesas-rpc-if.c | 20 ++++++++++++++++++++ drivers/mtd/spi-nor/core.c | 20 ++++++++++++++++++++ drivers/spi/spi-mem.c | 20 ++++++++++++++++++++ drivers/spi/spi-rpc-if.c | 9 +++++++++ include/linux/spi/spi-mem.h | 4 ++++ include/memory/renesas-rpc-if.h | 1 + 6 files changed, 74 insertions(+) -- 2.25.1
