Hi Thomas,
Thanks for the review.
On Fri, Oct 27, 2023 at 09:12:59AM +0200, Thomas Gleixner wrote:
> On Mon, Oct 23 2023 at 08:40, Yu Chien Peter Lin wrote:
> > Currently, the implementation of the RISC-V INTC driver uses the
> > interrupt cause as hwirq and has a limitation of supporting a
> > maximum of 64 hwirqs. However, according to the privileged spec,
> > interrupt causes >= 16 are defined for platform use.
> >
> > This limitation prevents us from fully utilizing the available
> > local interrupt sources. Additionally, the hwirqs used on RISC-V
> > are sparse, with only interrupt numbers 1, 5 and 9 (plus Sscofpmf
> > or T-Head's PMU irq) being currently used for supervisor mode.
> >
> > The patch switches to using irq_domain_create_tree() which
>
> git grep "This patch" Documentation/process/
Sure, will fix.
> > creates the radix tree map, allowing us to handle a larger
> > number of hwirqs.
>
> Who is 'us'? We are not part of the chip and please write out 'hardware
> interrupts'
OK!
> > @@ -24,10 +24,8 @@ static asmlinkage void riscv_intc_irq(struct pt_regs *regs)
> > {
> > unsigned long cause = regs->cause & ~CAUSE_IRQ_FLAG;
> >
> > - if (unlikely(cause >= BITS_PER_LONG))
> > - panic("unexpected interrupt cause");
> > -
> > - generic_handle_domain_irq(intc_domain, cause);
> > + if (generic_handle_domain_irq(intc_domain, cause))
> > + pr_warn("Failed to handle interrupt (cause: %ld)\n", cause);
>
> pr_warn_once() or at least pr_warn_ratelimited().
OK!
> > }
> >
> > /*
> > @@ -117,8 +115,8 @@ static int __init riscv_intc_init_common(struct fwnode_handle *fn)
> > {
> > int rc;
> >
> > - intc_domain = irq_domain_create_linear(fn, BITS_PER_LONG,
> > - &riscv_intc_domain_ops, NULL);
> > + intc_domain = irq_domain_create_tree(fn, &riscv_intc_domain_ops,
> > + NULL);
>
> Put it into one line. Linebreaking arguments is really only required
> when the line length is exceedingly long. This one is not.
OK! will fix.
Thanks,
Peter Lin
