On Mon, Oct 16, 2023 at 6:48 AM Christoph Hellwig <hch@xxxxxx> wrote: > > RISCV_DMA_NONCOHERENT is also used for whacky non-standard > non-coherent ops that use different hooks in dma-direct. > > Signed-off-by: Christoph Hellwig <hch@xxxxxx> > --- > arch/riscv/Kconfig | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx> Cheers, Prabhakar > diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig > index 0ac0b538379718..9c48fecc671918 100644 > --- a/arch/riscv/Kconfig > +++ b/arch/riscv/Kconfig > @@ -273,7 +273,6 @@ config RISCV_DMA_NONCOHERENT > select ARCH_HAS_SYNC_DMA_FOR_CPU > select ARCH_HAS_SYNC_DMA_FOR_DEVICE > select DMA_BOUNCE_UNALIGNED_KMALLOC if SWIOTLB > - select DMA_DIRECT_REMAP if MMU > > config RISCV_NONSTANDARD_CACHE_OPS > bool > @@ -549,6 +548,7 @@ config RISCV_ISA_ZICBOM > depends on RISCV_ALTERNATIVE > default y > select RISCV_DMA_NONCOHERENT > + select DMA_DIRECT_REMAP > help > Adds support to dynamically detect the presence of the ZICBOM > extension (Cache Block Management Operations) and enable its > -- > 2.39.2 >