On Thu, Sep 28, 2023 at 12:45 PM Prabhakar <prabhakar.csengg@xxxxxxxxx> wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
>
> Renesas RZ/Five SoC has OSTM blocks which can be used for clock_event and
> clocksource [0]. The clock_event rating for the OSTM is set 300 but
> whereas the rating for riscv-timer clock_event is set to 100 due to which
> the kernel is choosing OSTM for clock_event.
>
> As riscv-timer is much more efficient than MMIO clock_event, increase the
> rating to 400 so that the kernel prefers riscv-timer over the MMIO based
> clock_event.
>
> [0] drivers/clocksource/renesas-ostm.c
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
> ---
> Note, Ive set the rating similar to RISC-V clocksource, on ARM architecture
> the rating for clk_event is set to 450.
Makes sense.
Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
