CPU core bringup on SH-Mobile AG5 uses the SYS Boot Address (SBAR) and
Address Translation Area (APARMBAREA) registers to specify the base
address and size of the boot area of the System CPU. With this enabled,
when the System CPU accesses a physical address in the range from zero
up to the configured size, the top address bits are replaced by those
specified in the SBAR register. Hence any device residing in this low
part of physical address space cannot be accessed.
Prevent conflicts by reserving this memory region using
request_mem_region().
Signed-off-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
---
arch/arm/mach-shmobile/smp-sh73a0.c | 10 ++++++++--
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-shmobile/smp-sh73a0.c b/arch/arm/mach-shmobile/smp-sh73a0.c
index 453d488650295842..3757aed64c4241a5 100644
--- a/arch/arm/mach-shmobile/smp-sh73a0.c
+++ b/arch/arm/mach-shmobile/smp-sh73a0.c
@@ -44,10 +44,16 @@ static int sh73a0_boot_secondary(unsigned int cpu, struct task_struct *idle)
static void __init sh73a0_smp_prepare_cpus(unsigned int max_cpus)
{
- void __iomem *ap = ioremap(AP_BASE, PAGE_SIZE);
- void __iomem *sysc = ioremap(SYSC_BASE, PAGE_SIZE);
+ void __iomem *ap, *sysc;
+
+ if (!request_mem_region(0, SZ_4K, "Boot Area")) {
+ pr_err("Failed to request boot area\n");
+ return;
+ };
/* Map the reset vector (in headsmp.S) */
+ ap = ioremap(AP_BASE, PAGE_SIZE);
+ sysc = ioremap(SYSC_BASE, PAGE_SIZE);
writel(0, ap + APARMBAREA); /* 4k */
writel(__pa(shmobile_boot_vector), sysc + SBAR);
iounmap(sysc);
--
2.34.1
