On Mon, Aug 21, 2023 at 03:33:29PM +0200, Geert Uytterhoeven wrote:
> On Mon, Aug 21, 2023 at 3:06 PM Andy Shevchenko
> <andriy.shevchenko@xxxxxxxxxxxxxxx> wrote:
> > On Sun, Aug 20, 2023 at 07:44:01PM +0100, Biju Das wrote:
> > > The RT1715 needs 0.35V/0.75V rx threshold for rd/rp whereas it is 0.4V/0.7V
> > > for RT1711H. Add rxdz_sel variable to struct rt1711h_chip_info for
> > > handling this difference.
...
> > > struct rt1711h_chip_info {
> > > u16 did;
> > > + u32 rxdz_sel;
> > > };
> >
> > Again, run pahole. And see the difference, if any, depending on the place of a
> > new member. Note, some 64-bit architectures may require 8-byte alignment even
> > for 4-byte members.
>
> Doesn't make a difference, the size and alignment of a structure are
> always multiples of the largest alignment of each of the members, so
> the structure size will be 8 bytes on both 32-bit and 64-bit (except
> on m68k, where it will be 6 bytes).
>
> Either you have 2 bytes did, 2 bytes hole, and 4 bytes rxdz_sel, or
> 4 bytes rxdz, 2 bytes did, and 2 bytes hole (except on m68k, where
> there won't be any holes).
And I said "if any".
My suggestion is to check with pahole to be sure it's already good enough.
--
With Best Regards,
Andy Shevchenko
