Hi Arnd,
Thank you for the review.
On Wed, Jun 14, 2023 at 1:36 PM Arnd Bergmann <arnd@xxxxxxxx> wrote:
>
> On Wed, Jun 14, 2023, at 12:47, Prabhakar wrote:
> > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
> >
> > Introduce support for nonstandard noncoherent systems in the RISC-V
> > architecture. It enables function pointer support to handle cache
> > management in such systems.
> >
> > This patch adds a new configuration option called
> > "RISCV_NONSTANDARD_CACHE_OPS." This option is a boolean flag that
> > depends on "RISCV_DMA_NONCOHERENT" and enables the function pointer
> > support for cache management in nonstandard noncoherent systems.
> >
> > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
>
> I understand that Christoph will still not like this, but I think this
> is as good as it gets, making the standard variant the fast path,
> and using the function pointers only for the nonstandard cases.
>
>
> > #include <asm/cacheflush.h>
> > +#include <asm/dma-noncoherent.h>
> >
> > static bool noncoherent_supported;
> >
> > +struct riscv_cache_ops noncoherent_cache_ops = {
> > + .clean = NULL,
> > + .inval = NULL,
> > + .flush = NULL,
> > +};
>
> This could be marked __read_mostly or __ro_after_init as
> a micro-optimization, if anyone cares.
>
Ok, I will do that in the next version.
Cheers,
Prabhakar
