Hi Krzysztof Kozlowski, > Subject: Re: [PATCH RFC 1/6] dt-bindings: mfd: Add Renesas RAA215300 PMIC > bindings > > On 04/05/2023 18:13, Biju Das wrote: > > Hi Krzysztof Kozlowski, > > > > Thanks for the feedback. > > > >> Subject: Re: [PATCH RFC 1/6] dt-bindings: mfd: Add Renesas RAA215300 > >> PMIC bindings > >> > >> On 03/05/2023 10:46, Biju Das wrote: > >>> Document Renesas RAA215300 PMIC bindings. > >>> > >>> The RAA215300 is a high Performance 9-Channel PMIC supporting DDR > >>> Memory, with Built-In Charger and RTC. > >>> > >>> It supports DDR3, DDR3L, DDR4, and LPDDR4 memory power requirements. > >>> The internally compensated regulators, built-in Real-Time Clock > >>> (RTC), 32kHz crystal oscillator, and coin cell battery charger > >>> provide a highly integrated, small footprint power solution ideal > >>> for System-On-Module (SOM) applications. A spread spectrum feature > >>> provides an ease-of-use solution for noise-sensitive audio or RF > >>> applications. > >>> > >>> Signed-off-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx> > >>> --- > >>> .../bindings/mfd/renesas,raa215300.yaml | 57 +++++++++++++++++++ > >>> 1 file changed, 57 insertions(+) > >>> create mode 100644 > >>> Documentation/devicetree/bindings/mfd/renesas,raa215300.yaml > >>> > >>> diff --git > >>> a/Documentation/devicetree/bindings/mfd/renesas,raa215300.yaml > >>> b/Documentation/devicetree/bindings/mfd/renesas,raa215300.yaml > >>> new file mode 100644 > >>> index 000000000000..1e65f7618333 > >>> --- /dev/null > >>> +++ b/Documentation/devicetree/bindings/mfd/renesas,raa215300.yaml > >>> @@ -0,0 +1,57 @@ > >>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 > >>> +--- > >>> +$id: > >>> +title: Renesas RAA215300 Power Management Integrated Circuit (PMIC) > >>> + > >>> +maintainers: > >>> + - Biju Das <biju.das.jz@xxxxxxxxxxxxxx> > >>> + > >>> +description: | > >>> + The RAA215300 is a high-performance, low-cost 9-channel PMIC > >>> +designed for > >>> + 32-bit and 64-bit MCU and MPU applications. It supports DDR3, > >>> +DDR3L, DDR4, > >>> + and LPDDR4 memory power requirements. The internally compensated > >>> +regulators, > >>> + built-in Real-Time Clock (RTC), 32kHz crystal oscillator, and > >>> +coin cell > >>> + battery charger provide a highly integrated, small footprint > >>> +power solution > >>> + ideal for System-On-Module (SOM) applications. A spread spectrum > >>> +feature > >>> + provides an ease-of-use solution for noise-sensitive audio or RF > >> applications. > >>> + > >>> + This device exposes two devices via I2C. One for the integrated > >>> + RTC IP, and one for everything else. > >>> + > >>> + Link to datasheet: > >>> + > >>> + https://www.renesas.com/in/en/products/power-power-management/mult > >>> + i- > >>> + channel-power-management-ics-pmics/ssdsoc-power-management-ics-pmi > >>> + c- > >>> + and-pmus/raa215300-high-performance-9-channel-pmic-supporting-ddr- > >>> + me > >>> + mory-built-charger-and-rtc > >>> + > >>> +properties: > >>> + compatible: > >>> + enum: > >>> + - renesas,raa215300 > >>> + > >>> + reg: > >>> + maxItems: 1 > >>> + > >>> + renesas,raa215300-rtc: > >>> + $ref: /schemas/types.yaml#/definitions/phandle > >>> + description: phandle to the built-in RTC device. > >> > >> Why do you need phandle to anything else? This looks like wrong > >> relationship described. If these are siblings, why do you need > >> cross-linking via phandles? > >> > >> Most of PMICs are described with one node, even though RTC is on > >> separate address. > > > > OK, will model like below > > > > raa215300: pmic@12 { > > compatible = "renesas,raa215300"; > > reg = <0x12 0x6f>; > > reg-names = "main", "rtc"; > > Just two separate regs. I think this should work for I2C bus. The DT schema > allows multiple addresses for children. OK, I will add like below reg = <0x12>, <0x6f>; Apart from this, I would like to add below optional properties as the enabling is based On board design. renesas,rtc-enable: To indicate RTC IP is enabled (eg:Cases like both XIN and XOUT grounded) interrupts: (eg: Cases like interrupt line is not connected to SoC) Cheers, Biju
