RE: [PATCH 3/3] dmaengine: sh: rz-dmac: Add device_pause() callback

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Hi Vinod,

Thanks for the feedback.

> Subject: Re: [PATCH 3/3] dmaengine: sh: rz-dmac: Add device_pause() callback
> 
> On 24-03-23, 09:49, Biju Das wrote:
> > The device_pause() callback is needed for serial DMA (RZ/G2L SCIFA).
> > Add support for device_pause() callback.
> >
> > Based on a patch in the BSP by Long Luu <long.luu.ur@xxxxxxxxxxx>
> >
> > Signed-off-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
> > ---
> >  drivers/dma/sh/rz-dmac.c | 20 ++++++++++++++++++++
> >  1 file changed, 20 insertions(+)
> >
> > diff --git a/drivers/dma/sh/rz-dmac.c b/drivers/dma/sh/rz-dmac.c index
> > 3625925d9f9f..a0cfb8f75534 100644
> > --- a/drivers/dma/sh/rz-dmac.c
> > +++ b/drivers/dma/sh/rz-dmac.c
> > @@ -822,6 +822,25 @@ static enum dma_status rz_dmac_tx_status(struct
> dma_chan *chan,
> >  	return status;
> >  }
> >
> > +static int rz_dmac_device_pause(struct dma_chan *chan) {
> > +	struct rz_dmac_chan *channel = to_rz_dmac_chan(chan);
> > +	struct rz_dmac *dmac = to_rz_dmac(chan->device);
> > +	unsigned int i;
> > +	u32 chstat;
> > +
> > +	for (i = 0; i < 1024; i++) {
> > +		chstat = rz_dmac_ch_readl(channel, CHSTAT, 1);
> > +		if (!(chstat & CHSTAT_EN))
> > +			break;
> > +		udelay(1);
> > +	}
> > +
> > +	rz_dmac_set_dmars_register(dmac, channel->index, 0);
> > +
> > +	return 0;
> > +}
> > +
> >  /*
> >   * ----------------------------------------------------------------------
> -------
> >   * IRQ handling
> > @@ -1111,6 +1130,7 @@ static int rz_dmac_probe(struct platform_device
> *pdev)
> >  	engine->device_terminate_all = rz_dmac_terminate_all;
> >  	engine->device_issue_pending = rz_dmac_issue_pending;
> >  	engine->device_synchronize = rz_dmac_device_synchronize;
> > +	engine->device_pause = rz_dmac_device_pause;
> 
> No resume?

OK, will add resume.

+static int rz_dmac_device_resume(struct dma_chan *chan)
+{
+	struct rz_dmac_chan *channel = to_rz_dmac_chan(chan);
+	struct rz_dmac *dmac = to_rz_dmac(chan->device);
+
+	rz_dmac_set_dmars_register(dmac, channel->index, channel->mid_rid);
+
+	return 0;
+}

Cheers,
Biju

> 
> >
> >  	engine->copy_align = DMAENGINE_ALIGN_1_BYTE;
> >  	dma_set_max_seg_size(engine->dev, U32_MAX);
> > --
> > 2.25.1
> 
> --
> ~Vinod




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