[PATCH v3 5/5] arm64: dts: renesas: r9a07g044: Enable sci0 nodes using dt overlay

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Enable sci0 node using dt overlay and disable can{0,1}-stb-hog
nodes in dt overlay as its pins are shared with sci0 pins.

Signed-off-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
---
v3:
 * New patch
---
 arch/arm64/boot/dts/renesas/Makefile          |  1 +
 .../boot/dts/renesas/r9a07g043-smarc.dtso     | 45 +++++++++++++++++++
 2 files changed, 46 insertions(+)
 create mode 100644 arch/arm64/boot/dts/renesas/r9a07g043-smarc.dtso

diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile
index 23b10c03091c..be938f360264 100644
--- a/arch/arm64/boot/dts/renesas/Makefile
+++ b/arch/arm64/boot/dts/renesas/Makefile
@@ -76,6 +76,7 @@ dtb-$(CONFIG_ARCH_R8A77961) += r8a779m3-ulcb-kf.dtb
 dtb-$(CONFIG_ARCH_R8A77965) += r8a779m5-salvator-xs.dtb
 
 dtb-$(CONFIG_ARCH_R9A07G043) += r9a07g043u11-smarc.dtb
+dtb-$(CONFIG_ARCH_R9A07G043) += r9a07g043-smarc.dtbo
 
 dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044c2-smarc.dtb
 dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044l2-smarc.dtb
diff --git a/arch/arm64/boot/dts/renesas/r9a07g043-smarc.dtso b/arch/arm64/boot/dts/renesas/r9a07g043-smarc.dtso
new file mode 100644
index 000000000000..515f9fb82938
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/r9a07g043-smarc.dtso
@@ -0,0 +1,45 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source for the RZ/{G2UL, Five} SMARC EVK PMOD parts
+ *
+ * Copyright (C) 2023 Renesas Electronics Corp.
+ *
+ *
+ * [Connection]
+ *
+ * SMARC EVK				PMOD USBUART
+ * +----------------------------+
+ * |CN7 (PMOD1 PIN HEADER)	|
+ * |	SCI0_TXD	  pin7  |<----->| pin2  Tx	|
+ * |	SCI1_RXD	  pin8  |<----->| pin3  Rx	|
+ * |	Gnd	  	  pin11 |<----->| pin5  Gnd	|
+ * |	Vcc	  	  pin12 |<----->| pin6  Vcc	|
+ * +----------------------------+	+---------------+
+ *
+ */
+
+/dts-v1/;
+/plugin/;
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
+
+&pinctrl {
+	can0-stb-hog {
+		status = "disabled";
+	};
+
+	can1-stb-hog {
+		status = "disabled";
+	};
+
+	sci0_pins: sci0-pins {
+		pinmux = <RZG2L_PORT_PINMUX(2, 2, 5)>, /* TxD */
+			 <RZG2L_PORT_PINMUX(2, 3, 5)>; /* RxD */
+	};
+};
+
+&sci0 {
+	pinctrl-0 = <&sci0_pins>;
+	pinctrl-names = "default";
+	status = "okay";
+};
-- 
2.25.1




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