Hi Geert, Thank you for the review. On Mon, Feb 13, 2023 at 2:09 PM Geert Uytterhoeven <geert@xxxxxxxxxxxxxx> wrote: > > Hi Prabhakar, > > On Tue, Jan 31, 2023 at 11:42 PM Prabhakar <prabhakar.csengg@xxxxxxxxx> wrote: > > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx> > > > > Use a SoC specific macro for CPG and RESET so that we can re-use the > > RZ/G2L SoC DTSI for RZ/V2L SoC by just updating the SoC specific macro. > > > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx> > > --- > > v1->v2 > > * No change > > Thanks for your patch! > > > --- a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi > > +++ b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi > > @@ -1,12 +1,16 @@ > > // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > /* > > - * Device Tree Source for the RZ/G2L and RZ/G2LC common SoC parts > > + * Device Tree Source for the RZ/G2L, RZ/G2LC and RZ/V2L common SoC parts > > * > > * Copyright (C) 2021 Renesas Electronics Corp. > > */ > > > > #include <dt-bindings/interrupt-controller/arm-gic.h> > > + > > +#ifndef SOC_CPG_PREFIX > > #include <dt-bindings/clock/r9a07g044-cpg.h> > > +#define SOC_CPG_PREFIX(X) R9A07G044_ ## X > > As we're setting a precedent, this might as well be just SOC_PREFIX(X). > Some SoCs have multiple sets of definitions. Agreed. > I can make that change myself while/if applying. > Thank you. > Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx> > > > +#endif > Cheers, Prabhakar
