Hi Ilpo, Thanks for the feedback. > Subject: RE: [PATCH 3/3] serial: 8250_em: Add serial8250_rzv2m_reg_update() > > On Fri, 10 Feb 2023, Biju Das wrote: > > > Hi Geert, > > > > Thanks for the feedback. > > > > > Subject: Re: [PATCH 3/3] serial: 8250_em: Add > > > serial8250_rzv2m_reg_update() > > > > > > Hi Biju, > > > > > > On Thu, Feb 9, 2023 at 2:30 PM Biju Das <biju.das.jz@xxxxxxxxxxxxxx> > wrote: > > > > As per HW manual section 40.6.1, we need to perform FIFO reset + > > > > SW reset before updating the below registers > > > > > > > > FCR[7:5], FCR[3:0], LCR[7][5:0], MCR[6:4], DLL[7:0], DLM[7:0] and > > > > HCR0[6:5][3:2]. > > > > > > > > This patch adds serial8250_rzv2m_reg_update() to handle it. > > > > > > > > DLL/DLM register can be updated only by setting LCR[7]. So the > > > > updation of LCR[7] will perform reset for DLL/DLM register changes. > > > > > > > > Signed-off-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx> > > > > > > Thanks for your patch! > > > > > > > --- a/drivers/tty/serial/8250/8250_em.c > > > > +++ b/drivers/tty/serial/8250/8250_em.c > > > > > > > @@ -111,6 +156,10 @@ static int serial8250_em_probe(struct > > > > platform_device > > > *pdev) > > > > up.port.uartclk = clk_get_rate(priv->sclk); > > > > > > > > up.port.iotype = UPIO_MEM32; > > > > + > > > > + if (of_device_is_compatible(dev->of_node, > > > > + "renesas,r9a09g011- > > > uart")) > > > > + priv->is_rzv2m = true; > > > > > > Please add an entry to serial8250_em_dt_ids[] instead, providing a > > > feature flag in of_device_id.data. > > > > OK, will add a feature flag in next version. > > > > > + > > > > up.port.serial_in = serial8250_em_serial_in; > > > > up.port.serial_out = serial8250_em_serial_out; > > AFAICT, you don't need the feature flag at all. Just provide a different > .serial_out function for this device that handles your special registers > (and make that handler call serial8250_em_serial_out() when the write is > into other regs than those special ones). Agreed. Will send V2 with this change. Cheers, Biju
