On Thu, Feb 09, 2023 at 02:28:55PM +0000, Biju Das wrote:
> > From: Ilpo Järvinen <ilpo.jarvinen@xxxxxxxxxxxxxxx>
> > Sent: Thursday, February 9, 2023 2:09 PM
> > On Thu, 9 Feb 2023, Biju Das wrote:
> > > + [PORT_16750] = {
> > > + .name = "Renesas RZ/V2M 16750",
> > > + .fifo_size = 64,
> > > + .tx_loadsz = 64,
> > > + .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10 |
> > > + UART_FCR7_64BYTE,
> > > + .rxtrig_bytes = {1, 16, 32, 56},
> > > + .flags = UART_CAP_FIFO | UART_CAP_AFE,
> > > + },
> >
> > Eh, how can you reuse [PORT_16750] again in the initializer like that?
>
> Oops. Missed it. Is it ok to introduce PORT_RENESAS_16750_F64 instead
> as PORT_16750 is used by TI16750?
What the difference to the 16750 from TI that prevents you from using it?
--
With Best Regards,
Andy Shevchenko
