Hi Matthew, Thank you for the feedback. On Thu, Jan 26, 2023 at 2:37 PM Matthew Wilcox <willy@xxxxxxxxxxxxx> wrote: > > On Wed, Jan 25, 2023 at 12:30:13PM +0000, Lad, Prabhakar wrote: > > Renesas RZ/Five RISC-V SoC has Instruction local memory and Data local > > memory (ILM & DLM) mapped between region 0x30000 - 0x4FFFF. When a > > virtual address falls within this range, the MMU doesn't trigger a > > page fault; it assumes the virtual address is a physical address which > > can cause undesired behaviours. > > Wow. I've never come across such broken behaviour before. > > > To avoid this the ILM/DLM memory regions are now added to the root > > domain region of the PMPU with permissions set to 0x0 for S/U modes so > > that any access to these regions gets blocked and for M-mode we grant > > full access (R/W/X). This prevents any users from accessing these > > regions by triggering an unhandled signal 11 in S/U modes. > > I have no idea what any of this means. > Basically we are making use of the memory protection unit (MPU) so that only M-mode is allowed to access this region and S/U modes are blocked. > > This works as expected but for applications say for example when doing > > mmap to this region would still succeed and later down the path when > > doing a read/write to this location would cause unhandled signal 11. > > To handle this case gracefully we might want mmap() itself to fail if > > the addr/offset falls in this local memory region. > > No, that's not what you want. You want mmap to avoid allocating address > space in that virtual address range. I don't know if we have a good > way to do that at the moment; like I said I've never seen such broken > hardware before. > > I'd say the right way to solve this is to add a new special kind of VMA > to the address space that covers this range. Do you have any pointers where I can look further into this? > We'd want to make sure it doesn't appear in /proc/*/maps and also that > it can't be overridden with MAP_FIXED. Agreed. Cheers, Prabhakar
