Hi Wolfram,
On Fri, Jan 13, 2023 at 9:10 AM Wolfram Sang
<wsa+renesas@xxxxxxxxxxxxxxxxxxxx> wrote:
> From: Cong Dang <cong.dang.xn@xxxxxxxxxxx>
>
> According to the datasheets, the Strobe Timing Adjustment bit (STRTIM)
> setting is different on R-Car SoCs, i.e.
>
> R-Car H3 ES1.* : STRTIM[2:0] is set to 0x0
> R-Car M3 ES1.* : STRTIM[2:0] is set to 0x6
> other R-Car Gen3: STRTIM[2:0] is set to 0x7
> other R-Car Gen4: STRTIM[3:0] is set to 0xf
>
> To fix this issue, a DT match data was added to specify the setting
> for special use cases.
>
> Signed-off-by: Cong Dang <cong.dang.xn@xxxxxxxxxxx>
> Signed-off-by: Hai Pham <hai.pham.ud@xxxxxxxxxxx>
> [wsa: rebased, restructured a little, added Gen4 support]
> Signed-off-by: Wolfram Sang <wsa+renesas@xxxxxxxxxxxxxxxxxxxx>
Thanks for your patch!
> --- a/drivers/memory/renesas-rpc-if.c
> +++ b/drivers/memory/renesas-rpc-if.c
> @@ -15,6 +15,7 @@
> #include <linux/of_device.h>
> #include <linux/regmap.h>
> #include <linux/reset.h>
> +#include <linux/sys_soc.h>
>
> #include <memory/renesas-rpc-if.h>
>
> @@ -163,6 +164,36 @@ static const struct regmap_access_table rpcif_volatile_table = {
> .n_yes_ranges = ARRAY_SIZE(rpcif_volatile_ranges),
> };
>
> +static const struct rpcif_info rpcif_info_r8a7795_es1 = {
> + .type = RPCIF_RCAR_GEN3,
> + .strtim = 0,
> +};
> +
> +static const struct rpcif_info rpcif_info_r8a7796_es1 = {
> + .type = RPCIF_RCAR_GEN3,
> + .strtim = 6,
> +};
> +
> +static const struct rpcif_info rpcif_info_gen3 = {
> + .type = RPCIF_RCAR_GEN3,
> + .strtim = 7,
> +};
> +
> +static const struct rpcif_info rpcif_info_rz_g2l = {
> + .type = RPCIF_RZ_G2L,
> + .strtim = 7,
> +};
> +
> +static const struct rpcif_info rpcif_info_gen4 = {
> + .type = RPCIF_RCAR_GEN4,
> + .strtim = 15,
> +};
> +
> +static const struct soc_device_attribute rpcif_info_match[] = {
> + { .soc_id = "r8a7795", .revision = "ES1.*", .data = &rpcif_info_r8a7795_es1 },
> + { .soc_id = "r8a7796", .revision = "ES1.*", .data = &rpcif_info_r8a7796_es1 },
> + { /* Sentinel. */ }
> +};
>
> /*
> * Custom accessor functions to ensure SM[RW]DR[01] are always accessed with
> @@ -321,12 +359,9 @@ int rpcif_hw_init(struct rpcif *rpc, bool hyperflash)
> /* DMA Transfer is not supported */
> regmap_update_bits(rpc->regmap, RPCIF_PHYCNT, RPCIF_PHYCNT_HS, 0);
>
> - if (rpc->type == RPCIF_RCAR_GEN3)
> - regmap_update_bits(rpc->regmap, RPCIF_PHYCNT,
> - RPCIF_PHYCNT_STRTIM(7), RPCIF_PHYCNT_STRTIM(7));
> - else if (rpc->type == RPCIF_RCAR_GEN4)
> - regmap_update_bits(rpc->regmap, RPCIF_PHYCNT,
> - RPCIF_PHYCNT_STRTIM(15), RPCIF_PHYCNT_STRTIM(15));
> + regmap_update_bits(rpc->regmap, RPCIF_PHYCNT,
> + RPCIF_PHYCNT_STRTIM(rpc->info->strtim),
> + RPCIF_PHYCNT_STRTIM(rpc->info->strtim));
I'm not sure this is guaranteed to work, as using rpc->info->strtim as
the mask may not clear all bits (e.g. on R-Car M3-W it is 6, not 7), and
the initial values of the bits are documented to be undefined.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
