Hi Linus Walleij, Thanks for the feedback. > Subject: Re: [PATCH v5 0/9] Add RZ/G2L POEG support > > On Thu, Dec 15, 2022 at 10:32 PM Biju Das <biju.das.jz@xxxxxxxxxxxxxx> > wrote: > > > This patch series add support for controlling output disable function > using sysfs. > > What's wrong with using the debugfs approach Drew implemented in commit > 6199f6becc869d30ca9394ca0f7a484bf9d598eb > "pinctrl: pinmux: Add pinmux-select debugfs file" > ? I am not sure, we supposed to use debugfs for production environment?? Currently output pins of the general PWM timer (GPT) can be disabled by using the below methods. 1) Register setting(ie, by setting POEGGn.SSF to 1) --> by Software control 2) Input level detection of the GTETRGA to GTETRGD pins-> sending an active level signal to disable the output pins of PWM. 3) Output-disable request from the GPT--> Here GPT detects short circuits and request POEG to disable the output pins. In case, if any one doesn't want to use 2) and 3), we should be able to disable output pins of the general PWM timer (GPT) by register control. > > Something driver specific seems like a bit of a hack, does it not? > > If this should go into sysfs we should probably create something generic, Yes, generic sysfs entry will be good > such as a list of stuff to be exported as sysfs switches. Can you please elaborate? Or Point me to an example for this? Cheers, Biju
