Hi Prabhakar,
On Mon, Dec 12, 2022 at 12:55 PM Prabhakar <prabhakar.csengg@xxxxxxxxx> wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
>
> Pass direction and operation to ALT_CMO_OP() macro.
>
> Vendors might want to perform different operations based on the direction
> and callbacks (arch_sync_dma_for_device/arch_sync_dma_for_cpu/
> arch_dma_prep_coherent) so to handle such cases pass the direction and
> operation to ALT_CMO_OP() macro. This is in preparation for adding errata
> for the Andes CPU core.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
Thanks for your patch!
> --- a/arch/riscv/include/asm/errata_list.h
> +++ b/arch/riscv/include/asm/errata_list.h
> @@ -124,7 +124,7 @@ asm volatile(ALTERNATIVE( \
> #define THEAD_flush_A0 ".long 0x0275000b"
> #define THEAD_SYNC_S ".long 0x0190000b"
>
> -#define ALT_CMO_OP(_op, _start, _size, _cachesize) \
> +#define ALT_CMO_OP(_op, _start, _size, _cachesize, _dir, _ops) \
Since commit a49ab905a1fc8630 ("RISC-V: Implement arch specific PMEM
APIs") in riscv/for-next, there are two new users of this macro,
which need to be updated to (add two zeroes?).
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
