Hi Biju,
On Thu, Nov 24, 2022 at 8:17 PM Biju Das <biju.das.jz@xxxxxxxxxxxxxx> wrote:
> The RZ/V2{M, MA} PWM Timer supports the following functions:
>
> * The PWM has 24-bit counters which operate at PWM_CLK (48 MHz).
> * The frequency division ratio for internal counter operation is
> selectable as PWM_CLK divided by 1, 16, 256, or 2048.
> * The period as well as the duty cycle is adjustable.
> * The low-level and high-level order of the PWM signals can be
> inverted.
> * The duty cycle of the PWM signal is selectable in the range from
> 0 to 100%.
> * The minimum resolution is 20.83 ns.
> * Three interrupt sources: Rising and falling edges of the PWM signal
> and clearing of the counter
> * Counter operation and the bus interface are asynchronous and both
> can operate independently of the magnitude relationship of the
> respective clock periods.
>
> Signed-off-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
> ---
> v1->v2:
> * Replaced devm_reset_control_get_optional_shared->devm_reset_control_get_shared
Thanks for the update!
> --- /dev/null
> +++ b/drivers/pwm/pwm-rzv2m.c
> +static void rzv2m_pwm_get_state(struct pwm_chip *chip, struct pwm_device *pwm,
> + struct pwm_state *state)
> +{
As of commit 6c452cff79f8bf1c ("pwm: Make .get_state() callback return
an error code") in pwm/for-next, this needs to return an error code
(but you probably already know).
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
