When CLK_TYPE_GEN4_PLL4 was added to the rcar_gen4_clk_types enum, it
was inserted at a random location. Restore sort order of the clock
types referring to PLLs.
Signed-off-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
---
To be queued in renesas-clk-for-v6.3.
drivers/clk/renesas/rcar-gen4-cpg.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/renesas/rcar-gen4-cpg.h b/drivers/clk/renesas/rcar-gen4-cpg.h
index 0b15dcfdca7b5af7..0a0e3bdb3a664c10 100644
--- a/drivers/clk/renesas/rcar-gen4-cpg.h
+++ b/drivers/clk/renesas/rcar-gen4-cpg.h
@@ -15,8 +15,8 @@ enum rcar_gen4_clk_types {
CLK_TYPE_GEN4_PLL2,
CLK_TYPE_GEN4_PLL2X_3X, /* r8a779a0 only */
CLK_TYPE_GEN4_PLL3,
- CLK_TYPE_GEN4_PLL5,
CLK_TYPE_GEN4_PLL4,
+ CLK_TYPE_GEN4_PLL5,
CLK_TYPE_GEN4_PLL6,
CLK_TYPE_GEN4_SDSRC,
CLK_TYPE_GEN4_SDH,
--
2.25.1
