Hi Geert,
Thank you for the review.
On Thu, Nov 17, 2022 at 11:13 AM Geert Uytterhoeven
<geert@xxxxxxxxxxxxxx> wrote:
>
> Hi Prabhakar,
>
> On Mon, Nov 7, 2022 at 6:53 PM Prabhakar <prabhakar.csengg@xxxxxxxxx> wrote:
> > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
> >
> > Add IRQC node to R9A07G043 (RZ/G2UL) SoC DTSI.
> >
> > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
>
> Thanks for your patch!
>
> > ---
> > Note,
> > - clocks and resets are differnt when compared to RZ/Five hence its added
> > in r9a07g043u.dtsi
> > - We have additional interrupt on RZ/Five hence interrupts are added in
> > r9a07g043u.dtsi
>
> Which additional interrupts?
> Do you already have the r9a06g043f-variant ready, so we can compare?
>
I missed this RZ/G2UL has this interrupt too. So ignore this point.
> > - clock-names is also added in r9a07g043u.dtsi to avoid dtbs_check warning
>
> Why does this warn?
>
If we add the clock-names property in the base dtsi we get a
dtbs_check warning "clocks is a dependency of clock-names" for RZ/Five
as we haven't added the clocks property to it.
> > --- a/arch/arm64/boot/dts/renesas/r9a07g043.dtsi
> > +++ b/arch/arm64/boot/dts/renesas/r9a07g043.dtsi
> > @@ -538,6 +538,14 @@ pinctrl: pinctrl@11030000 {
> > <&cpg R9A07G043_GPIO_SPARE_RESETN>;
> > };
> >
> > + irqc: interrupt-controller@110a0000 {
> > + #interrupt-cells = <2>;
> > + #address-cells = <0>;
> > + interrupt-controller;
> > + reg = <0 0x110a0000 0 0x10000>;
>
> The size of the "reg" property will be 0x20000 on RZ/Five, to cover the
> extra [NIT]MSK registers, so I think this belongs in r9a07g043u.dtsi, too.
>
Agreed.
Cheers,
Prabhakar
