Hi Geert-san,
> From: Geert Uytterhoeven, Sent: Tuesday, November 15, 2022 12:29 AM
>
> The RSwitch2 and EtherTSN-IF clocks were accidentally mixed up.
> While at it, rename them to better match the documentation.
>
> Fixes: a3b4137a4d4023e6 ("clk: renesas: r8a779f0: Add Ethernet Switch clocks")
> Signed-off-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
Thank you for the patch!
I checked the latest internal datasheet, and then target module name of
the MSTPCR15 bit 6 was renamed again...
Before: EtherTSN-IF
After : Ethernet SERDES
# I believe that the latest datasheet will be released in near the future...
So...
> ---
> Noticed while reviewing the DTS counterpart.
> Compile-tested only.
>
> To be queued in renesas-clk for v6.2.
> ---
> drivers/clk/renesas/r8a779f0-cpg-mssr.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/clk/renesas/r8a779f0-cpg-mssr.c b/drivers/clk/renesas/r8a779f0-cpg-mssr.c
> index 800fdc104edd657f..f03d616cc36da6e2 100644
> --- a/drivers/clk/renesas/r8a779f0-cpg-mssr.c
> +++ b/drivers/clk/renesas/r8a779f0-cpg-mssr.c
> @@ -163,8 +163,8 @@ static const struct mssr_mod_clk r8a779f0_mod_clks[] __initconst = {
> DEF_MOD("cmt3", 913, R8A779F0_CLK_R),
> DEF_MOD("pfc0", 915, R8A779F0_CLK_CL16M),
> DEF_MOD("tsc", 919, R8A779F0_CLK_CL16M),
> - DEF_MOD("tsn", 1505, R8A779F0_CLK_S0D2_HSC),
> - DEF_MOD("rsw", 1506, R8A779F0_CLK_RSW2),
> + DEF_MOD("rswitch2", 1505, R8A779F0_CLK_RSW2),
> + DEF_MOD("ethertsn-if", 1506, R8A779F0_CLK_S0D2_HSC),
this should be "ether-serdes" or somethings like that, I think.
Anyway, I tested this patch on my environment, and it works correctly.
So,
Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@xxxxxxxxxxx>
# I'll send my Reviewed-by after the target name was changed.
Best regards,
Yoshihiro Shimoda
> DEF_MOD("ufs", 1514, R8A779F0_CLK_S0D4_HSC),
> };
>
> --
> 2.25.1
