> -----Original Message-----
> From: Lad, Prabhakar <prabhakar.csengg@xxxxxxxxx>
> Sent: 08 November 2022 09:10
> To: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
> Cc: Thomas Gleixner <tglx@xxxxxxxxxxxxx>; Marc Zyngier <maz@xxxxxxxxxx>; Rob
> Herring <robh+dt@xxxxxxxxxx>; Krzysztof Kozlowski
> <krzysztof.kozlowski+dt@xxxxxxxxxx>; Geert Uytterhoeven
> <geert+renesas@xxxxxxxxx>; Magnus Damm <magnus.damm@xxxxxxxxx>; Linus Walleij
> <linus.walleij@xxxxxxxxxx>; linux-gpio@xxxxxxxxxxxxxxx; linux-renesas-
> soc@xxxxxxxxxxxxxxx; devicetree@xxxxxxxxxxxxxxx; linux-
> kernel@xxxxxxxxxxxxxxx; Prabhakar Mahadev Lad <prabhakar.mahadev-
> lad.rj@xxxxxxxxxxxxxx>
> Subject: Re: [PATCH RFC 2/5] pinctrl: renesas: rzg2l: Fix configuring the
> GPIO pins as interrupts
>
> Hi Biju,
>
> On Tue, Nov 8, 2022 at 7:14 AM Biju Das <biju.das.jz@xxxxxxxxxxxxxx> wrote:
> >
> > Hi Prabhakar,
> >
> >
> > > Subject: [PATCH RFC 2/5] pinctrl: renesas: rzg2l: Fix configuring
> > > the GPIO pins as interrupts
> > >
> > > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
> > >
> > > On the RZ/G2UL SoC we have less number of pins compared to RZ/G2L
> > > and also the pin configs are completely different. This patch makes
> > > sure we use the appropriate pin configs for each SoC (which is
> > > passed as part of the OF
> > > data) while configuring the GPIO pin as interrupts instead of using
> > > rzg2l_gpio_configs[] for all the SoCs.
> > >
> >
> > Looks like you are missing fixes tag.
> > Fixes: db2e5f21a48ed ("pinctrl: renesas: pinctrl-rzg2l: Add IRQ domain
> > to handle GPIO interrupt")
> >
> I did think about but then I realised this fixes the GPIO IRQ functions only
> and we didn't support IRQC and GPIO interrupts up until now so I hadn't added
> the fixes tag.
Yep that is true, even though we have pinctrl support for both RZ/G2L and RZ/G2UL.
Interrupt support added only for RZ/G2L at that time. Maybe change to reflect
RZ/G2UL GPIO interrupt support.
Cheers,
Biju
