Hi Biju,
Thank you for the review.
On Wed, Sep 28, 2022 at 8:02 AM Biju Das <biju.das.jz@xxxxxxxxxxxxxx> wrote:
>
> Hi Prabhakar,
>
> > Subject: [RFC PATCH 1/2] clk: renesas: rzg2l: Don't assume all CPG_MOD
> > clocks support PM
> >
> > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
> >
> > There are cases where not all CPG_MOD clocks should be assumed to
> > support PM. For example on the CRU block there is a particular
> > sequence that needs to be followed to initialize the CSI-2 D-PHY in
> > which individual clocks need to be turned ON/OFF, due to which Runtime
> > PM support wasn't used by the CRU CSI-2 driver.
> >
> > This patch adds support to allow indicating if PM is supported by the
> > CPG_MOD clocks. A new macro is DEF_NO_PM() is added which sets the
> > no_pm flag in struct rzg2l_mod_clk and when the driver uses Runtime PM
> > support no_pm flag is checked to see if the clk needs to included as
> > part of Runtime PM.
> >
> > CPG_MOD clocks with no_pm flag set need to be individually turned
> > ON/OFF depending on the requirement of the driver.
> >
> > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
> > ---
> > drivers/clk/renesas/rzg2l-cpg.c | 35 +++++++++++++++++++++++++++++---
> > - drivers/clk/renesas/rzg2l-cpg.h | 12 ++++++++---
> > 2 files changed, 40 insertions(+), 7 deletions(-)
> >
> > diff --git a/drivers/clk/renesas/rzg2l-cpg.c
> > b/drivers/clk/renesas/rzg2l-cpg.c index 3ff6ecd61756..d275324909e7
> > 100644
> > --- a/drivers/clk/renesas/rzg2l-cpg.c
> > +++ b/drivers/clk/renesas/rzg2l-cpg.c
> > @@ -114,6 +114,8 @@ struct rzg2l_cpg_priv {
> > struct rzg2l_pll5_mux_dsi_div_param mux_dsi_div_params; };
> >
> > +static struct rzg2l_cpg_priv *rzg2l_cpg_priv;
> > +
> > static void rzg2l_cpg_del_clk_provider(void *data) {
> > of_clk_del_provider(data);
> > @@ -1223,18 +1225,42 @@ static int
> > rzg2l_cpg_reset_controller_register(struct rzg2l_cpg_priv *priv)
> > return devm_reset_controller_register(priv->dev, &priv->rcdev);
> > }
> >
> > +static inline const struct rzg2l_mod_clk *rzg2l_get_mod_clk(const
> > +struct rzg2l_cpg_info *info, int id) {
> > + unsigned int i;
> > +
> > + id += info->num_total_core_clks;
> > + for (i = 0; i < info->num_mod_clks; i++) {
> > + if (info->mod_clks[i].id == id)
> > + return &info->mod_clks[i];
> > + }
>
> May be as an optimization add ID and clk to a separate list
> and traverse that smaller list for DEF_NO_PM case.
>
> case CPG_MOD:
> return rzg2l_cpg_is_pm_mod(clkspec->args[1]);
>
Are you suggesting adding no_pm_mod_clks and no_pm_mod_clks or
building an internal structure in struct rzg2l_cpg_priv while calling
rzg2l_cpg_register_mod_clk() for each mod clock?
Cheers,
Prabhakar
