The RZ/G2L multi-function timer pulse unit 3 (MTU3a) is embedded in
the Renesas RZ/G2L family SoC's. It consists of eight 16-bit timer
channels and one 32-bit timer channel. It supports the following
functions
- Counter
- Timer
- PWM
This patch series aim to add MFD and counter driver for MTU3a.
Subsequent patch seies will add TImer and PWM driver support
also enhancements to counter driver.
The 8/16/32 bit registers are mixed in each channel. The HW
specifications of the IP is described in patch#2.
Current patch set is tested for 16-bit phase counting mode on
MTU1 channel.
Please share your valuable comments on this patch series.
Biju Das (8):
clk: renesas: r9a07g044: Add MTU3a clock and reset entry
dt-bindings: mfd: Document RZ/G2L MTU3a bindings
mfd: Add RZ/G2L MTU3 driver
dt-bindings: mfd: rzg2l-mtu3: Document RZ/G2UL MTU3 counter
counter: Add RZ/G2L MTU3 counter driver
arm64: dts: renesas: r9a07g044: Add MTU3a node
arm64: dts: renesas: r9a07g054: Add MTU3a node
arm64: dts: renesas: rzg2l-smarc: [HACK] Enable MTU for 16-bit phase
count testing
.../bindings/mfd/renesas,rzg2l-mtu3.yaml | 310 ++++++++++++++
arch/arm64/boot/dts/renesas/r9a07g044.dtsi | 83 ++++
.../boot/dts/renesas/r9a07g044l2-smarc.dts | 2 -
arch/arm64/boot/dts/renesas/r9a07g054.dtsi | 83 ++++
.../dts/renesas/rzg2l-smarc-pinfunction.dtsi | 11 +
arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi | 25 +-
drivers/clk/renesas/r9a07g044-cpg.c | 5 +-
drivers/counter/Kconfig | 9 +
drivers/counter/Makefile | 1 +
drivers/counter/rzg2l-mtu3-cnt.c | 367 +++++++++++++++++
drivers/mfd/Kconfig | 9 +
drivers/mfd/Makefile | 1 +
drivers/mfd/rzg2l-mtu3.c | 377 ++++++++++++++++++
include/linux/mfd/rzg2l-mtu3.h | 124 ++++++
14 files changed, 1403 insertions(+), 4 deletions(-)
create mode 100644 Documentation/devicetree/bindings/mfd/renesas,rzg2l-mtu3.yaml
create mode 100644 drivers/counter/rzg2l-mtu3-cnt.c
create mode 100644 drivers/mfd/rzg2l-mtu3.c
create mode 100644 include/linux/mfd/rzg2l-mtu3.h
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2.25.1
