CC wsa
On Mon, Sep 19, 2022 at 10:41 AM Biju Das <biju.das.jz@xxxxxxxxxxxxxx> wrote:
> Currently, determine_rate() is not doing any round operation
> and due to this it always selects a lower clock source compared
> to the closest higher one.
>
> Support sd clk mux round operation by passing
> CLK_MUX_ROUND_CLOSEST flag to clk_mux_determine_rate_flags().
>
> Signed-off-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
i.e. will queue in renesas-clk-for-v6.2.
> --- a/drivers/clk/renesas/rzg2l-cpg.c
> +++ b/drivers/clk/renesas/rzg2l-cpg.c
> @@ -182,7 +182,7 @@ rzg2l_cpg_mux_clk_register(const struct cpg_core_clk *core,
> static int rzg2l_cpg_sd_clk_mux_determine_rate(struct clk_hw *hw,
> struct clk_rate_request *req)
> {
> - return clk_mux_determine_rate_flags(hw, req, 0);
> + return clk_mux_determine_rate_flags(hw, req, CLK_MUX_ROUND_CLOSEST);
> }
>
> static int rzg2l_cpg_sd_clk_mux_set_parent(struct clk_hw *hw, u8 index)
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
