Re: [PATCH v6 2/2] pwm: Add support for RZ/G2L GPT

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Hi Biju,

On Sat, Sep 24, 2022 at 6:10 PM Biju Das <biju.das.jz@xxxxxxxxxxxxxx> wrote:
> Note:
> I have a plan to develop another PWM driver using MTU IP on the same SoC.
> The work is not started yet.

That is the MTU3, which seems to be a further evolution of the MTU2
in e.g. RZ/A1, which is already supported as a timer through the
sh_mtu2 driver?

> For this IP, I planned to use MFD framework for the MTU driver and
> Will add counter driver, timer driver(clock source, clock event)
> and pwm driver as child devices.
>
> Currently the MFD driver and 16-Bit Phase Counting using counter framework
> is almost done.

Do you really need an MFD? (MFDs trigger a red flag for me ;-)
E.g. there are two sets of bindings for renesas,tpu: when #pwm-cells
is present, it is used for PWM, otherwise it is used as a timer.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds



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