On Tue, Sep 20, 2022 at 07:48:59PM +0100, Prabhakar wrote: > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx> > > Add ARCH_RENESAS config option to allow selecting the Renesas RISC-V SoCs. > We currently have the newly added RZ/Five (R9A07G043) RISC-V based SoC. > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx> > --- > v3 -> v4 > * Dropped SOC_RENESAS_RZFIVE config option > * Dropped explicitly selecting SOC_BUS/GPIOLIB/PINCTRL configs > under ARCH_RENESAS > * Updated commit message > * Dropped RB tag > * Used riscv instead of RISC-V in subject line > > v2 -> v3 > * Included RB tag from Geert > > v1 -> v2 > * No Change > --- > arch/riscv/Kconfig.socs | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs > index 69774bb362d6..5c420ed55ef9 100644 > --- a/arch/riscv/Kconfig.socs > +++ b/arch/riscv/Kconfig.socs > @@ -80,4 +80,9 @@ config SOC_CANAAN_K210_DTB_SOURCE > > endif # SOC_CANAAN I am not asking for a respin for this since no-one likely cares, but I think a future goal would be to sort the file alphabetically. I'll probably do it with the other 30-something patches my Kconfig.socs rework series has got to now - but if you *are* respinning sorting alphabetically (ignoring the CANAAN) would reduce future churn. Thanks, Conor. > > +config ARCH_RENESAS > + bool "Renesas RISC-V SoCs" > + help > + This enables support for the RISC-V based Renesas SoCs. > + > endmenu # "SoC selection" > -- > 2.25.1 > > > _______________________________________________ > linux-riscv mailing list > linux-riscv@xxxxxxxxxxxxxxxxxxx > http://lists.infradead.org/mailman/listinfo/linux-riscv
