Hi Geert,
> Subject: RE: [PATCH v3 3/3] ARM: dts: r9a06g032-rzn1d400-db: Enable
> CAN{0,1}
>
> Hi Geert,
>
> Thanks for the feedback.
>
> > Subject: Re: [PATCH v3 3/3] ARM: dts: r9a06g032-rzn1d400-db: Enable
> > CAN{0,1}
> >
> > Hi Biju,
> >
> > On Tue, Aug 30, 2022 at 6:45 PM Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
> > wrote:
> > > Enable CAN{0,1} on RZ/N1D-DB board.
>
> My bad, it is RZ/N1D-DB CPU board fitted to RZ/N1-EB carrier board.
> Actually it enables CAN{0,1} on the carrier board.
>
> > >
> > > Signed-off-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
> > > ---
> > > v2->v3:
> > > * No change
> >
> > Thanks for your patch!
> >
> > > --- a/arch/arm/boot/dts/r9a06g032-rzn1d400-db.dts
> > > +++ b/arch/arm/boot/dts/r9a06g032-rzn1d400-db.dts
> > > @@ -26,6 +26,20 @@ aliases {
> > > };
> > > };
> > >
> > > +&can0 {
> > > + pinctrl-0 = <&pins_can0>;
> > > + pinctrl-names = "default";
> > > +
> > > + status = "okay";
> > > +};
> > > +
> > > +&can1 {
> > > + pinctrl-0 = <&pins_can1>;
> > > + pinctrl-names = "default";
> > > +
> > > + status = "okay";
> > > +};
> >
> > According to the schematics and board documentation, only a single CAN
>
> See above, RZ/N1-EB schematics has both connectors??
>
> > connector is present, and the CAN interface to use must be selected
> > using the CN10/CN11 jumpers. Hence I think we need a #define and an
> > #ifdef to configure this, or at least keep one interface disabled, and
> > add a comment explaining why.
OK, To avoid confusion, will guard enabling CAN1 with #define macro
as cpu schematic doesn't mention about this.
Cheers,
Biju
>
> Our BSP release, by default enables both the CAN interfaces(CN10/CN11)
> jumpers.
> I have a RZ/N1-EB carrier board and tested CAN loopback on these
> interfaces.
>
> Cheers,
> biju
>
