[PATCH 1/4] clk: renesas: r8a779f0: Add MSIOF clocks

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Signed-off-by: Wolfram Sang <wsa+renesas@xxxxxxxxxxxxxxxxxxxx>
---

For V3U, we also used "msiX" as clock names, so I followed that. I
wonder, though, if we shouldn't keep using "msiofX" and rename V3U as
well?

 drivers/clk/renesas/r8a779f0-cpg-mssr.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/clk/renesas/r8a779f0-cpg-mssr.c b/drivers/clk/renesas/r8a779f0-cpg-mssr.c
index 0faf13060ce8..adaed73097d7 100644
--- a/drivers/clk/renesas/r8a779f0-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a779f0-cpg-mssr.c
@@ -131,6 +131,10 @@ static const struct mssr_mod_clk r8a779f0_mod_clks[] __initconst = {
 	DEF_MOD("i2c3",		521,	R8A779F0_CLK_S0D6_PER),
 	DEF_MOD("i2c4",		522,	R8A779F0_CLK_S0D6_PER),
 	DEF_MOD("i2c5",		523,	R8A779F0_CLK_S0D6_PER),
+	DEF_MOD("msi0",		618,	R8A779F0_CLK_MSO),
+	DEF_MOD("msi1",		619,	R8A779F0_CLK_MSO),
+	DEF_MOD("msi2",		620,	R8A779F0_CLK_MSO),
+	DEF_MOD("msi3",		621,	R8A779F0_CLK_MSO),
 	DEF_MOD("pcie0",	624,	R8A779F0_CLK_S0D2),
 	DEF_MOD("pcie1",	625,	R8A779F0_CLK_S0D2),
 	DEF_MOD("scif0",	702,	R8A779F0_CLK_S0D12_PER),
-- 
2.35.1




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