On Thu, Jul 21, 2022 at 4:35 PM Biju Das <biju.das.jz@xxxxxxxxxxxxxx> wrote:
> RSPI IP on RZ/{A, G2L} SoC's has the same signal for both interrupt
> and DMA transfer request. Setting DMARS register for DMA transfer
> makes the signal to work as a DMA transfer request signal and
> subsequent interrupt requests to the interrupt controller
> are masked.
>
> PIO fallback does not work as interrupt signal is disabled.
>
> This patch fixes this issue by re-enabling the interrupts by
> calling dmaengine_synchronize().
>
> Signed-off-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
> ---
> v2->v3:
> * dmaengine_synchronize() called unconditionally and removed need_dmar_clr.
Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
