On Sat, Jun 25, 2022 at 10:07 PM Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx> wrote: > Add IRQ domain to RZ/G2L pinctrl driver to handle GPIO interrupt. > > GPIO0-GPIO122 pins can be used as IRQ lines but only 32 pins can be > used as IRQ lines at a given time. Selection of pins as IRQ lines > is handled by IA55 (which is the IRQC block) which sits in between the > GPIO and GIC. > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx> Looks OK to me, as long as I get Marc's approval I'l merge this! Reviewed-by: Linus Walleij <linus.walleij@xxxxxxxxxx> Maybe Marc want to apply all patches to the irqchip tree? Yours, Linus Walleij
