Hi Morimoto-san,
Thanks for your patch!
On Tue, Jun 14, 2022 at 8:01 AM Kuninori Morimoto
<kuninori.morimoto.gx@xxxxxxxxxxx> wrote:
> From: Kuninori Morimoto <kuninori.morimoto.gx@xxxxxxxxxxx>
>
> AVB1 needs MODSEL1, AVB2 needs MODSEL5 settings.
AVB1 needs MODSEL6
> This patch adds missing MODSELx setting for these.
>
> Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@xxxxxxxxxxx>
> --- a/drivers/pinctrl/renesas/pfc-r8a779g0.c
> +++ b/drivers/pinctrl/renesas/pfc-r8a779g0.c
> @@ -745,27 +745,29 @@ static const u16 pinmux_data[] = {
> PINMUX_IPSR_NOGM(0, TSN0_AVTP_PPS1, SEL_TSN0_AVTP_PPS1_1),
> PINMUX_IPSR_NOGM(0, TSN0_MDC, SEL_TSN0_MDC_1),
>
> + /* TSN0 without MDSEL5 */
MODSEL5
> PINMUX_SINGLE(AVB2_RX_CTL),
> - PINMUX_SINGLE(AVB2_TX_CTL),
> PINMUX_SINGLE(AVB2_RXC),
> PINMUX_SINGLE(AVB2_RD0),
> - PINMUX_SINGLE(AVB2_TXC),
> - PINMUX_SINGLE(AVB2_TD0),
> PINMUX_SINGLE(AVB2_RD1),
> PINMUX_SINGLE(AVB2_RD2),
> - PINMUX_SINGLE(AVB2_TD1),
> - PINMUX_SINGLE(AVB2_TD2),
> PINMUX_SINGLE(AVB2_MDIO),
> PINMUX_SINGLE(AVB2_RD3),
> - PINMUX_SINGLE(AVB2_TD3),
> PINMUX_SINGLE(AVB2_TXCREFCLK),
> - PINMUX_SINGLE(AVB2_MDC),
> - PINMUX_SINGLE(AVB2_MAGIC),
> PINMUX_SINGLE(AVB2_PHY_INT),
> PINMUX_SINGLE(AVB2_LINK),
> - PINMUX_SINGLE(AVB2_AVTP_MATCH),
> PINMUX_SINGLE(AVB2_AVTP_CAPTURE),
> - PINMUX_SINGLE(AVB2_AVTP_PPS),
> + /* TSN0 with MDSEL5 */
MODSEL5
> + PINMUX_IPSR_NOGM(0, AVB2_TX_CTL, SEL_AVB2_TX_CTL_1),
> + PINMUX_IPSR_NOGM(0, AVB2_TXC, SEL_AVB2_TXC_1),
> + PINMUX_IPSR_NOGM(0, AVB2_TD0, SEL_AVB2_TD0_1),
> + PINMUX_IPSR_NOGM(0, AVB2_TD1, SEL_AVB2_TD1_1),
> + PINMUX_IPSR_NOGM(0, AVB2_TD2, SEL_AVB2_TD2_1),
> + PINMUX_IPSR_NOGM(0, AVB2_TD3, SEL_AVB2_TD3_1),
> + PINMUX_IPSR_NOGM(0, AVB2_MDC, SEL_AVB2_MDC_1),
> + PINMUX_IPSR_NOGM(0, AVB2_MAGIC, SEL_AVB2_MAGIC_1),
> + PINMUX_IPSR_NOGM(0, AVB2_AVTP_MATCH, SEL_AVB2_AVTP_MATCH_1),
> + PINMUX_IPSR_NOGM(0, AVB2_AVTP_PPS, SEL_AVB2_AVTP_PPS_1),
>
> /* IP0SR0 */
> PINMUX_IPSR_GPSR(IP0SR0_3_0, ERROROUTC_B),
> @@ -1060,23 +1062,23 @@ static const u16 pinmux_data[] = {
> /* IP0SR6 */
> PINMUX_IPSR_GPSR(IP0SR6_3_0, AVB1_MDIO),
>
> - PINMUX_IPSR_GPSR(IP0SR6_7_4, AVB1_MAGIC),
> + PINMUX_IPSR_MSEL(IP0SR6_7_4, AVB1_MAGIC, SEL_AVB1_MAGIC_1),
>
> - PINMUX_IPSR_GPSR(IP0SR6_11_8, AVB1_MDC),
> + PINMUX_IPSR_MSEL(IP0SR6_11_8, AVB1_MDC, SEL_AVB1_MDC_1),
>
> PINMUX_IPSR_GPSR(IP0SR6_15_12, AVB1_PHY_INT),
>
> PINMUX_IPSR_GPSR(IP0SR6_19_16, AVB1_LINK),
> PINMUX_IPSR_GPSR(IP0SR6_19_16, AVB1_MII_TX_ER),
>
> - PINMUX_IPSR_GPSR(IP0SR6_23_20, AVB1_AVTP_MATCH),
> - PINMUX_IPSR_GPSR(IP0SR6_23_20, AVB1_MII_RX_ER),
> + PINMUX_IPSR_MSEL(IP0SR6_23_20, AVB1_AVTP_MATCH, SEL_AVB1_AVTP_MATCH_1),
> + PINMUX_IPSR_MSEL(IP0SR6_23_20, AVB1_MII_RX_ER, SEL_AVB1_AVTP_MATCH_0),
>
> - PINMUX_IPSR_GPSR(IP0SR6_27_24, AVB1_TXC),
> - PINMUX_IPSR_GPSR(IP0SR6_27_24, AVB1_MII_TXC),
> + PINMUX_IPSR_MSEL(IP0SR6_27_24, AVB1_TXC, SEL_AVB1_TXC_1),
> + PINMUX_IPSR_MSEL(IP0SR6_27_24, AVB1_MII_TXC, SEL_AVB1_TXC_0),
This doesn't look right to me: if TXC needs output enable, I would
expect MII_TXC to need output enable, too.
The same is true for (at least) TD[0-3].
>
> - PINMUX_IPSR_GPSR(IP0SR6_31_28, AVB1_TX_CTL),
> - PINMUX_IPSR_GPSR(IP0SR6_31_28, AVB1_MII_TX_EN),
> + PINMUX_IPSR_MSEL(IP0SR6_31_28, AVB1_TX_CTL, SEL_AVB1_TX_CTL_1),
> + PINMUX_IPSR_MSEL(IP0SR6_31_28, AVB1_MII_TX_EN, SEL_AVB1_TX_CTL_0),
>
> /* IP1SR6 */
> PINMUX_IPSR_GPSR(IP1SR6_3_0, AVB1_RXC),
> @@ -1085,17 +1087,17 @@ static const u16 pinmux_data[] = {
> PINMUX_IPSR_GPSR(IP1SR6_7_4, AVB1_RX_CTL),
> PINMUX_IPSR_GPSR(IP1SR6_7_4, AVB1_MII_RX_DV),
>
> - PINMUX_IPSR_GPSR(IP1SR6_11_8, AVB1_AVTP_PPS),
> - PINMUX_IPSR_GPSR(IP1SR6_11_8, AVB1_MII_COL),
> + PINMUX_IPSR_MSEL(IP1SR6_11_8, AVB1_AVTP_PPS, SEL_AVB1_AVTP_PPS_1),
> + PINMUX_IPSR_MSEL(IP1SR6_11_8, AVB1_MII_COL, SEL_AVB1_AVTP_PPS_0),
>
> PINMUX_IPSR_GPSR(IP1SR6_15_12, AVB1_AVTP_CAPTURE),
> PINMUX_IPSR_GPSR(IP1SR6_15_12, AVB1_MII_CRS),
>
> - PINMUX_IPSR_GPSR(IP1SR6_19_16, AVB1_TD1),
> - PINMUX_IPSR_GPSR(IP1SR6_19_16, AVB1_MII_TD1),
> + PINMUX_IPSR_MSEL(IP1SR6_19_16, AVB1_TD1, SEL_AVB1_TD1_1),
> + PINMUX_IPSR_MSEL(IP1SR6_19_16, AVB1_MII_TD1, SEL_AVB1_TD1_0),
>
> - PINMUX_IPSR_GPSR(IP1SR6_23_20, AVB1_TD0),
> - PINMUX_IPSR_GPSR(IP1SR6_23_20, AVB1_MII_TD0),
> + PINMUX_IPSR_MSEL(IP1SR6_23_20, AVB1_TD0, SEL_AVB1_TD0_1),
> + PINMUX_IPSR_MSEL(IP1SR6_23_20, AVB1_MII_TD0, SEL_AVB1_TD0_0),
>
> PINMUX_IPSR_GPSR(IP1SR6_27_24, AVB1_RD1),
> PINMUX_IPSR_GPSR(IP1SR6_27_24, AVB1_MII_RD1),
> @@ -1104,14 +1106,14 @@ static const u16 pinmux_data[] = {
> PINMUX_IPSR_GPSR(IP1SR6_31_28, AVB1_MII_RD0),
>
> /* IP2SR6 */
> - PINMUX_IPSR_GPSR(IP2SR6_3_0, AVB1_TD2),
> - PINMUX_IPSR_GPSR(IP2SR6_3_0, AVB1_MII_TD2),
> + PINMUX_IPSR_MSEL(IP2SR6_3_0, AVB1_TD2, SEL_AVB1_TD2_1),
> + PINMUX_IPSR_MSEL(IP2SR6_3_0, AVB1_MII_TD2, SEL_AVB1_TD2_0),
>
> PINMUX_IPSR_GPSR(IP2SR6_7_4, AVB1_RD2),
> PINMUX_IPSR_GPSR(IP2SR6_7_4, AVB1_MII_RD2),
>
> - PINMUX_IPSR_GPSR(IP2SR6_11_8, AVB1_TD3),
> - PINMUX_IPSR_GPSR(IP2SR6_11_8, AVB1_MII_TD3),
> + PINMUX_IPSR_MSEL(IP2SR6_11_8, AVB1_TD3, SEL_AVB1_TD3_1),
> + PINMUX_IPSR_MSEL(IP2SR6_11_8, AVB1_MII_TD3, SEL_AVB1_TD3_0),
>
> PINMUX_IPSR_GPSR(IP2SR6_15_12, AVB1_RD3),
> PINMUX_IPSR_GPSR(IP2SR6_15_12, AVB1_MII_RD3),
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
