Hi Morimoto-san,
On Tue, Jun 7, 2022 at 3:08 AM Kuninori Morimoto
<kuninori.morimoto.gx@xxxxxxxxxxx> wrote:
> From: Phong Hoang <phong.hoang.wz@xxxxxxxxxxx>
>
> This patch adds SCIF, I2C, EthernetAVB, HSCIF, MMC, QSPI,
> MSIOF, PWM, CAN-FD, Ethernet-TSN, PCIe pins, groups, and functions
>
> [Morimoto merged above patches into one]
> Signed-off-by: Phong Hoang <phong.hoang.wz@xxxxxxxxxxx>
> Signed-off-by: Hai Pham <hai.pham.ud@xxxxxxxxxxx>
> Signed-off-by: Thanh Quan <thanh.quan.xn@xxxxxxxxxxx>
> Signed-off-by: CongDang <cong.dang.xn@xxxxxxxxxxx>
> Signed-off-by: Kazuya Mizuguch <kazuya.mizuguchi.ks@xxxxxxxxxxx>
> Signed-off-by: Tho Vu <tho.vu.wh@xxxxxxxxxxx>
> Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@xxxxxxxxxxx>
> ---
> drivers/pinctrl/renesas/pfc-r8a779g0.c | 1619 +++++++++++++++++++++++-
> 1 file changed, 1618 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/pinctrl/renesas/pfc-r8a779g0.c b/drivers/pinctrl/renesas/pfc-r8a779g0.c
> index 0f4a84283ee8..3a484638038a 100644
> --- a/drivers/pinctrl/renesas/pfc-r8a779g0.c
> +++ b/drivers/pinctrl/renesas/pfc-r8a779g0.c
> @@ -1212,12 +1212,1629 @@ static const struct sh_pfc_pin pinmux_pins[] = {
> PINMUX_GPIO_GP_ALL(),
> };
>
> +/* - AVB0 ------------------------------------------------ */
> +static const unsigned int avb0_link_pins[] = {
> + /* AVB0_LINK */
> + RCAR_GP_PIN(7, 4),
> +};
> +static const unsigned int avb0_link_mux[] = {
> + AVB0_LINK_MARK,
> +};
> +static const unsigned int avb0_magic_pins[] = {
> + /* AVB0_MAGIC */
> + RCAR_GP_PIN(7, 10),
> +};
> +static const unsigned int avb0_magic_mux[] = {
> + AVB0_MAGIC_MARK,
> +};
> +static const unsigned int avb0_phy_int_pins[] = {
> + /* AVB0_PHY_INT */
> + RCAR_GP_PIN(7, 5),
> +};
> +static const unsigned int avb0_phy_int_mux[] = {
> + AVB0_PHY_INT_MARK,
> +};
> +static const unsigned int avb0_mdio_pins[] = {
> + /* AVB0_MDC, AVB0_MDIO */
> + RCAR_GP_PIN(7, 13), RCAR_GP_PIN(7, 14),
> +};
> +static const unsigned int avb0_mdio_mux[] = {
> + AVB0_MDC_MARK, AVB0_MDIO_MARK,
> +};
> +static const unsigned int avb0_rgmii_pins[] = {
> + /*
> + * AVB0_TX_CTL, AVB0_TXC, AVB0_TD0, AVB0_TD1, AVB0_TD2, AVB0_TD3,
> + * AVB0_RX_CTL, AVB0_RXC, AVB0_RD0, AVB0_RD1, AVB0_RD2, AVB0_RD3,
> + */
> + RCAR_GP_PIN(7, 16), RCAR_GP_PIN(7, 15),
> + RCAR_GP_PIN(7, 11), RCAR_GP_PIN(7, 7),
> + RCAR_GP_PIN(7, 6), RCAR_GP_PIN(7, 3),
> + RCAR_GP_PIN(7, 20), RCAR_GP_PIN(7, 19),
> + RCAR_GP_PIN(7, 18), RCAR_GP_PIN(7, 17),
> + RCAR_GP_PIN(7, 12), RCAR_GP_PIN(7, 8),
> +};
> +static const unsigned int avb0_rgmii_mux[] = {
> + AVB0_TX_CTL_MARK, AVB0_TXC_MARK,
> + AVB0_TD0_MARK, AVB0_TD1_MARK,
> + AVB0_TD2_MARK, AVB0_TD3_MARK,
> + AVB0_RX_CTL_MARK, AVB0_RXC_MARK,
> + AVB0_RD0_MARK, AVB0_RD1_MARK,
> + AVB0_RD2_MARK, AVB0_RD3_MARK,
> +};
> +static const unsigned int avb0_txcrefclk_pins[] = {
> + /* AVB0_TXCREFCLK */
> + RCAR_GP_PIN(7, 9),
> +};
> +static const unsigned int avb0_txcrefclk_mux[] = {
> + AVB0_TXCREFCLK_MARK,
> +};
> +static const unsigned int avb0_avtp_pps_pins[] = {
> + /* AVB0_AVTP_PPS */
> + RCAR_GP_PIN(7, 0),
> +};
> +static const unsigned int avb0_avtp_pps_mux[] = {
> + AVB0_AVTP_PPS_MARK,
> +};
> +static const unsigned int avb0_avtp_capture_pins[] = {
> + /* AVB0_AVTP_CAPTURE */
> + RCAR_GP_PIN(7, 1),
> +};
> +static const unsigned int avb0_avtp_capture_mux[] = {
> + AVB0_AVTP_CAPTURE_MARK,
> +};
> +static const unsigned int avb0_avtp_match_pins[] = {
> + /* AVB0_AVTP_MATCH */
> + RCAR_GP_PIN(7, 2),
> +};
> +static const unsigned int avb0_avtp_match_mux[] = {
> + AVB0_AVTP_MATCH_MARK,
> +};
This lacks a set for the RMII pins. The same is true for AVB1.
See e.g. gether_rmii_pins[] on R-Car V3H.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
