Hi Geert, Sorry for the late reply. On Thu, May 19, 2022 at 7:57 AM Geert Uytterhoeven <geert@xxxxxxxxxxxxxx> wrote: > > Hi Prabhakar, > > On Thu, May 19, 2022 at 7:45 AM Lad, Prabhakar > <prabhakar.csengg@xxxxxxxxx> wrote: > > On Tue, May 10, 2022 at 3:02 PM Geert Uytterhoeven <geert@xxxxxxxxxxxxxx> wrote: > > > On Thu, May 5, 2022 at 9:32 PM Lad Prabhakar > > > <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx> wrote: > > > > Renesas RZ/Five SoC has almost the same clock structure compared to the > > > > Renesas RZ/G2UL SoC, re-use the r9a07g043-cpg.h header file and just > > > > ammend the RZ/Five CPG clock and reset definitions. > > > > > > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx> > > > > > > > --- a/include/dt-bindings/clock/r9a07g043-cpg.h > > > > +++ b/include/dt-bindings/clock/r9a07g043-cpg.h > > > > @@ -108,6 +108,15 @@ > > > > #define R9A07G043_ADC_ADCLK 76 > > > > #define R9A07G043_ADC_PCLK 77 > > > > #define R9A07G043_TSU_PCLK 78 > > > > +#define R9A07G043_NCEPLDM_DM_CLK 79 /* RZ/Five Only */ > > > > > > While NCEPLDM_DM_CLK is listed in the clock list spreadsheet, its > > > control bit is not documented. > > > > > > > +#define R9A07G043_NCEPLDM_ACLK 80 /* RZ/Five Only */ > > > > +#define R9A07G043_NCEPLDM_TCK 81 /* RZ/Five Only */ > > > > > > While NCEPLDM_TCK is listed in the clock list spreadsheet, its > > > control bit is not documented. > > > > > I have got the feedback for the above, NCEPLDM_DM_CLK and NCEPLDM_TCK > > clocks cannot be stopped as a result there are no register bits for it > > in the HW manual (clock spreadsheet will be updated). I will drop this > > and send a v2 including your RB. > > The question is not if the clocks can be stopped or not, but if there > is any need to refer to them from a DT node. As per DT rule we have to add ;) > What's the nature of the future update to the clock spreadsheet? > I have got confirmation from HW team, the UM and clock list will not be updated, * NCEPLDM_DM_CLK, NCEPLDM_TCK and NCEPLDM_ACLK actually exist, and should be listed on the clock list. Only NCEPLDM_ACLK has a mechanism to stop. * Therefore, only NCEPLDM_ACLK should appear on the Clock Control register on the UM. > Of course, if we don't add these clock definitions now, they can > still be added later. DT binding definitions are append-only. > For now I will keep them. Cheers, Prabhakar
